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https://github.com/edk2-porting/linux-next.git
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wlcore/wl12xx: move ref_clock and tcxo_clock elements to wl12xx
Only wl12xx needs to get the ref_clock anc tcxo_clock values from the platform data. Move these elements from the wl1271 structure to wl12xx's private data. Signed-off-by: Luciano Coelho <coelho@ti.com> Signed-off-by: Arik Nemtsov <arik@wizery.com>
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8388569a34
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a5d751bb92
@ -65,6 +65,7 @@ int wl1271_cmd_general_parms(struct wl1271 *wl)
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struct wl1271_general_parms_cmd *gen_parms;
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struct wl1271_ini_general_params *gp =
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&((struct wl1271_nvs_file *)wl->nvs)->general_params;
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struct wl12xx_priv *priv = wl->priv;
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bool answer = false;
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int ret;
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@ -88,7 +89,7 @@ int wl1271_cmd_general_parms(struct wl1271 *wl)
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answer = true;
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/* Override the REF CLK from the NVS with the one from platform data */
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gen_parms->general_params.ref_clock = wl->ref_clock;
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gen_parms->general_params.ref_clock = priv->ref_clock;
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ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), answer);
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if (ret < 0) {
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@ -118,6 +119,7 @@ int wl128x_cmd_general_parms(struct wl1271 *wl)
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struct wl128x_general_parms_cmd *gen_parms;
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struct wl128x_ini_general_params *gp =
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&((struct wl128x_nvs_file *)wl->nvs)->general_params;
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struct wl12xx_priv *priv = wl->priv;
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bool answer = false;
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int ret;
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@ -141,8 +143,8 @@ int wl128x_cmd_general_parms(struct wl1271 *wl)
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answer = true;
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/* Replace REF and TCXO CLKs with the ones from platform data */
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gen_parms->general_params.ref_clock = wl->ref_clock;
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gen_parms->general_params.tcxo_ref_clock = wl->tcxo_clock;
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gen_parms->general_params.ref_clock = priv->ref_clock;
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gen_parms->general_params.tcxo_ref_clock = priv->tcxo_clock;
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ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), answer);
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if (ret < 0) {
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@ -40,6 +40,9 @@
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#include "cmd.h"
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#include "acx.h"
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static char *fref_param;
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static char *tcxo_param;
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static struct wlcore_conf wl12xx_conf = {
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.sg = {
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.params = {
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@ -773,6 +776,7 @@ static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)
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u16 spare_reg;
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u16 pll_config;
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u8 input_freq;
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struct wl12xx_priv *priv = wl->priv;
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/* Mask bits [3:1] in the sys_clk_cfg register */
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spare_reg = wl12xx_top_reg_read(wl, WL_SPARE_REG);
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@ -782,8 +786,8 @@ static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)
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wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg);
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/* Handle special cases of the TCXO clock */
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if (wl->tcxo_clock == WL12XX_TCXOCLOCK_16_8 ||
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wl->tcxo_clock == WL12XX_TCXOCLOCK_33_6)
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if (priv->tcxo_clock == WL12XX_TCXOCLOCK_16_8 ||
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priv->tcxo_clock == WL12XX_TCXOCLOCK_33_6)
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return wl128x_manually_configure_mcs_pll(wl);
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/* Set the input frequency according to the selected clock source */
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@ -808,11 +812,12 @@ static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)
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*/
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static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock)
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{
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struct wl12xx_priv *priv = wl->priv;
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u16 sys_clk_cfg;
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/* For XTAL-only modes, FREF will be used after switching from TCXO */
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if (wl->ref_clock == WL12XX_REFCLOCK_26_XTAL ||
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wl->ref_clock == WL12XX_REFCLOCK_38_XTAL) {
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if (priv->ref_clock == WL12XX_REFCLOCK_26_XTAL ||
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priv->ref_clock == WL12XX_REFCLOCK_38_XTAL) {
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if (!wl128x_switch_tcxo_to_fref(wl))
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return -EINVAL;
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goto fref_clk;
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@ -826,8 +831,8 @@ static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock)
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goto fref_clk;
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/* If TCXO is either 32.736MHz or 16.368MHz, switch to FREF */
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if (wl->tcxo_clock == WL12XX_TCXOCLOCK_16_368 ||
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wl->tcxo_clock == WL12XX_TCXOCLOCK_32_736) {
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if (priv->tcxo_clock == WL12XX_TCXOCLOCK_16_368 ||
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priv->tcxo_clock == WL12XX_TCXOCLOCK_32_736) {
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if (!wl128x_switch_tcxo_to_fref(wl))
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return -EINVAL;
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goto fref_clk;
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@ -836,14 +841,14 @@ static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock)
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/* TCXO clock is selected */
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if (!wl128x_is_tcxo_valid(wl))
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return -EINVAL;
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*selected_clock = wl->tcxo_clock;
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*selected_clock = priv->tcxo_clock;
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goto config_mcs_pll;
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fref_clk:
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/* FREF clock is selected */
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if (!wl128x_is_fref_valid(wl))
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return -EINVAL;
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*selected_clock = wl->ref_clock;
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*selected_clock = priv->ref_clock;
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config_mcs_pll:
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return wl128x_configure_mcs_pll(wl, *selected_clock);
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@ -851,25 +856,26 @@ config_mcs_pll:
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static int wl127x_boot_clk(struct wl1271 *wl)
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{
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struct wl12xx_priv *priv = wl->priv;
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u32 pause;
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u32 clk;
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if (WL127X_PG_GET_MAJOR(wl->hw_pg_ver) < 3)
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wl->quirks |= WLCORE_QUIRK_END_OF_TRANSACTION;
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if (wl->ref_clock == CONF_REF_CLK_19_2_E ||
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wl->ref_clock == CONF_REF_CLK_38_4_E ||
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wl->ref_clock == CONF_REF_CLK_38_4_M_XTAL)
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if (priv->ref_clock == CONF_REF_CLK_19_2_E ||
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priv->ref_clock == CONF_REF_CLK_38_4_E ||
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priv->ref_clock == CONF_REF_CLK_38_4_M_XTAL)
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/* ref clk: 19.2/38.4/38.4-XTAL */
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clk = 0x3;
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else if (wl->ref_clock == CONF_REF_CLK_26_E ||
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wl->ref_clock == CONF_REF_CLK_52_E)
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else if (priv->ref_clock == CONF_REF_CLK_26_E ||
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priv->ref_clock == CONF_REF_CLK_52_E)
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/* ref clk: 26/52 */
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clk = 0x5;
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else
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return -EINVAL;
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if (wl->ref_clock != CONF_REF_CLK_19_2_E) {
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if (priv->ref_clock != CONF_REF_CLK_19_2_E) {
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u16 val;
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/* Set clock type (open drain) */
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val = wl12xx_top_reg_read(wl, OCP_REG_CLK_TYPE);
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@ -939,6 +945,7 @@ static int wl1271_boot_soft_reset(struct wl1271 *wl)
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static int wl12xx_pre_boot(struct wl1271 *wl)
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{
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struct wl12xx_priv *priv = wl->priv;
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int ret = 0;
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u32 clk;
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int selected_clock = -1;
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@ -970,7 +977,7 @@ static int wl12xx_pre_boot(struct wl1271 *wl)
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if (wl->chip.id == CHIP_ID_1283_PG20)
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clk |= ((selected_clock & 0x3) << 1) << 4;
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else
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clk |= (wl->ref_clock << 1) << 4;
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clk |= (priv->ref_clock << 1) << 4;
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wl1271_write32(wl, WL12XX_DRPW_SCRATCH_START, clk);
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@ -1333,6 +1340,7 @@ static struct ieee80211_sta_ht_cap wl12xx_ht_cap = {
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static int __devinit wl12xx_probe(struct platform_device *pdev)
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{
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struct wl12xx_platform_data *pdata = pdev->dev.platform_data;
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struct wl1271 *wl;
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struct ieee80211_hw *hw;
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struct wl12xx_priv *priv;
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@ -1344,6 +1352,7 @@ static int __devinit wl12xx_probe(struct platform_device *pdev)
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}
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wl = hw->priv;
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priv = wl->priv;
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wl->ops = &wl12xx_ops;
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wl->ptable = wl12xx_ptable;
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wl->rtable = wl12xx_rtable;
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@ -1357,6 +1366,48 @@ static int __devinit wl12xx_probe(struct platform_device *pdev)
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memcpy(&wl->ht_cap, &wl12xx_ht_cap, sizeof(wl12xx_ht_cap));
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wl12xx_conf_init(wl);
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if (!fref_param) {
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priv->ref_clock = pdata->board_ref_clock;
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} else {
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if (!strcmp(fref_param, "19.2"))
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priv->ref_clock = WL12XX_REFCLOCK_19;
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else if (!strcmp(fref_param, "26"))
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priv->ref_clock = WL12XX_REFCLOCK_26;
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else if (!strcmp(fref_param, "26x"))
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priv->ref_clock = WL12XX_REFCLOCK_26_XTAL;
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else if (!strcmp(fref_param, "38.4"))
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priv->ref_clock = WL12XX_REFCLOCK_38;
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else if (!strcmp(fref_param, "38.4x"))
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priv->ref_clock = WL12XX_REFCLOCK_38_XTAL;
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else if (!strcmp(fref_param, "52"))
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priv->ref_clock = WL12XX_REFCLOCK_52;
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else
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wl1271_error("Invalid fref parameter %s", fref_param);
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}
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if (!tcxo_param) {
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priv->tcxo_clock = pdata->board_tcxo_clock;
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} else {
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if (!strcmp(tcxo_param, "19.2"))
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priv->tcxo_clock = WL12XX_TCXOCLOCK_19_2;
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else if (!strcmp(tcxo_param, "26"))
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priv->tcxo_clock = WL12XX_TCXOCLOCK_26;
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else if (!strcmp(tcxo_param, "38.4"))
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priv->tcxo_clock = WL12XX_TCXOCLOCK_38_4;
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else if (!strcmp(tcxo_param, "52"))
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priv->tcxo_clock = WL12XX_TCXOCLOCK_52;
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else if (!strcmp(tcxo_param, "16.368"))
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priv->tcxo_clock = WL12XX_TCXOCLOCK_16_368;
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else if (!strcmp(tcxo_param, "32.736"))
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priv->tcxo_clock = WL12XX_TCXOCLOCK_32_736;
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else if (!strcmp(tcxo_param, "16.8"))
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priv->tcxo_clock = WL12XX_TCXOCLOCK_16_8;
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else if (!strcmp(tcxo_param, "33.6"))
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priv->tcxo_clock = WL12XX_TCXOCLOCK_33_6;
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else
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wl1271_error("Invalid tcxo parameter %s", tcxo_param);
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}
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return wlcore_probe(wl, pdev);
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}
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@ -1388,6 +1439,13 @@ static void __exit wl12xx_exit(void)
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}
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module_exit(wl12xx_exit);
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module_param_named(fref, fref_param, charp, 0);
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MODULE_PARM_DESC(fref, "FREF clock: 19.2, 26, 26x, 38.4, 38.4x, 52");
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module_param_named(tcxo, tcxo_param, charp, 0);
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MODULE_PARM_DESC(tcxo,
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"TCXO clock: 19.2, 26, 38.4, 52, 16.368, 32.736, 16.8, 33.6");
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
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MODULE_FIRMWARE(WL127X_FW_NAME_SINGLE);
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@ -26,6 +26,9 @@
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struct wl12xx_priv {
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struct wl12xx_priv_conf conf;
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int ref_clock;
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int tcxo_clock;
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};
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#endif /* __WL12XX_PRIV_H__ */
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@ -535,8 +535,7 @@ static ssize_t driver_state_read(struct file *file, char __user *user_buf,
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DRIVER_STATE_PRINT_LHEX(ap_ps_map);
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DRIVER_STATE_PRINT_HEX(quirks);
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DRIVER_STATE_PRINT_HEX(irq);
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DRIVER_STATE_PRINT_HEX(ref_clock);
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DRIVER_STATE_PRINT_HEX(tcxo_clock);
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/* TODO: ref_clock and tcxo_clock were moved to wl12xx priv */
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DRIVER_STATE_PRINT_HEX(hw_pg_ver);
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DRIVER_STATE_PRINT_HEX(platform_quirks);
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DRIVER_STATE_PRINT_HEX(chip.id);
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@ -5295,8 +5295,6 @@ int __devinit wlcore_probe(struct wl1271 *wl, struct platform_device *pdev)
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wlcore_adjust_conf(wl);
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wl->irq = platform_get_irq(pdev, 0);
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wl->ref_clock = pdata->board_ref_clock;
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wl->tcxo_clock = pdata->board_tcxo_clock;
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wl->platform_quirks = pdata->platform_quirks;
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wl->set_power = pdata->set_power;
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wl->dev = &pdev->dev;
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@ -130,7 +130,6 @@ struct wl1271 {
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void (*set_power)(bool enable);
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int irq;
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int ref_clock;
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spinlock_t wl_lock;
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@ -288,8 +287,6 @@ struct wl1271 {
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/* bands supported by this instance of wl12xx */
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struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
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int tcxo_clock;
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/*
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* wowlan trigger was configured during suspend.
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* (currently, only "ANY" trigger is supported)
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