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https://github.com/edk2-porting/linux-next.git
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[PATCH] x86-64: Move cpu verification code to common file
o This patch moves the code to verify long mode and SSE to a common file. This code is now shared by trampoline.S, wakeup.S, boot/setup.S and boot/compressed/head.S o So far we used to do very limited check in trampoline.S, wakeup.S and in 32bit entry point. Now all the entry paths are forced to do the exhaustive check, including SSE because verify_cpu is shared. o I am keeping this patch as last in the x86 relocatable series because previous patches have got quite some amount of testing done and don't want to distrub that. So that if there is problem introduced by this patch, at least it can be easily isolated. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de>
This commit is contained in:
Vivek Goyal
Andi Kleen
parent
8035d3ea78
commit
a4831e08b7
@ -54,6 +54,15 @@ startup_32:
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1: popl %ebp
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subl $1b, %ebp
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/* setup a stack and make sure cpu supports long mode. */
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movl $user_stack_end, %eax
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addl %ebp, %eax
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movl %eax, %esp
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call verify_cpu
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testl %eax, %eax
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jnz no_longmode
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/* Compute the delta between where we were compiled to run at
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* and where the code will actually run at.
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*/
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@ -159,13 +168,21 @@ startup_32:
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/* Jump from 32bit compatibility mode into 64bit mode. */
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lret
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no_longmode:
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/* This isn't an x86-64 CPU so hang */
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1:
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hlt
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jmp 1b
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#include "../../kernel/verify_cpu.S"
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/* Be careful here startup_64 needs to be at a predictable
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* address so I can export it in an ELF header. Bootloaders
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* should look at the ELF header to find this address, as
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* it may change in the future.
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*/
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.code64
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.org 0x100
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.org 0x200
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ENTRY(startup_64)
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/* We come here either from startup_32 or directly from a
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* 64bit bootloader. If we come here from a bootloader we depend on
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@ -299,64 +299,10 @@ loader_ok:
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movw %cs,%ax
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movw %ax,%ds
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/* minimum CPUID flags for x86-64 */
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/* see http://www.x86-64.org/lists/discuss/msg02971.html */
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#define SSE_MASK ((1<<25)|(1<<26))
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#define REQUIRED_MASK1 ((1<<0)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<8)|\
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(1<<13)|(1<<15)|(1<<24))
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#define REQUIRED_MASK2 (1<<29)
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call verify_cpu
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testl %eax,%eax
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jz sse_ok
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pushfl /* standard way to check for cpuid */
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popl %eax
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movl %eax,%ebx
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xorl $0x200000,%eax
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pushl %eax
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popfl
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pushfl
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popl %eax
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cmpl %eax,%ebx
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jz no_longmode /* cpu has no cpuid */
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movl $0x0,%eax
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cpuid
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cmpl $0x1,%eax
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jb no_longmode /* no cpuid 1 */
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xor %di,%di
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cmpl $0x68747541,%ebx /* AuthenticAMD */
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jnz noamd
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cmpl $0x69746e65,%edx
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jnz noamd
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cmpl $0x444d4163,%ecx
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jnz noamd
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mov $1,%di /* cpu is from AMD */
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noamd:
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movl $0x1,%eax
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cpuid
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andl $REQUIRED_MASK1,%edx
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xorl $REQUIRED_MASK1,%edx
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jnz no_longmode
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movl $0x80000000,%eax
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cpuid
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cmpl $0x80000001,%eax
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jb no_longmode /* no extended cpuid */
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movl $0x80000001,%eax
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cpuid
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andl $REQUIRED_MASK2,%edx
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xorl $REQUIRED_MASK2,%edx
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jnz no_longmode
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sse_test:
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movl $1,%eax
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cpuid
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andl $SSE_MASK,%edx
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cmpl $SSE_MASK,%edx
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je sse_ok
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test %di,%di
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jz no_longmode /* only try to force SSE on AMD */
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movl $0xc0010015,%ecx /* HWCR */
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rdmsr
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btr $15,%eax /* enable SSE */
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wrmsr
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xor %di,%di /* don't loop */
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jmp sse_test /* try again */
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no_longmode:
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call beep
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lea long_mode_panic,%si
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@ -366,7 +312,8 @@ no_longmode_loop:
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long_mode_panic:
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.string "Your CPU does not support long mode. Use a 32bit distribution."
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.byte 0
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#include "../kernel/verify_cpu.S"
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sse_ok:
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popw %ds
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@ -43,6 +43,11 @@ wakeup_code:
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cmpl $0x12345678, %eax
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jne bogus_real_magic
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call verify_cpu # Verify the cpu supports long
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# mode
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testl %eax, %eax
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jnz no_longmode
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testl $1, video_flags - wakeup_code
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jz 1f
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lcall $0xc000,$3
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@ -92,18 +97,6 @@ wakeup_32:
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# Running in this code, but at low address; paging is not yet turned on.
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movb $0xa5, %al ; outb %al, $0x80
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/* Check if extended functions are implemented */
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movl $0x80000000, %eax
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cpuid
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cmpl $0x80000000, %eax
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jbe bogus_cpu
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wbinvd
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mov $0x80000001, %eax
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cpuid
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btl $29, %edx
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jnc bogus_cpu
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movl %edx,%edi
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movl $__KERNEL_DS, %eax
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movl %eax, %ds
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@ -123,6 +116,11 @@ wakeup_32:
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leal (wakeup_level4_pgt - wakeup_code)(%esi), %eax
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movl %eax, %cr3
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/* Check if nx is implemented */
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movl $0x80000001, %eax
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cpuid
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movl %edx,%edi
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/* Enable Long Mode */
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xorl %eax, %eax
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btsl $_EFER_LME, %eax
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@ -244,10 +242,12 @@ bogus_64_magic:
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movb $0xb3,%al ; outb %al,$0x80
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jmp bogus_64_magic
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bogus_cpu:
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movb $0xbc,%al ; outb %al,$0x80
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jmp bogus_cpu
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.code16
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no_longmode:
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movb $0xbc,%al ; outb %al,$0x80
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jmp no_longmode
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#include "../verify_cpu.S"
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/* This code uses an extended set of video mode numbers. These include:
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* Aliases for standard modes
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@ -54,6 +54,8 @@ r_base = .
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movw $(trampoline_stack_end - r_base), %sp
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call verify_cpu # Verify the cpu supports long mode
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testl %eax, %eax # Check for return code
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jnz no_longmode
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mov %cs, %ax
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movzx %ax, %esi # Find the 32bit trampoline location
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@ -121,57 +123,10 @@ startup_64:
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jmp *%rax
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.code16
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verify_cpu:
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pushl $0 # Kill any dangerous flags
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popfl
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/* minimum CPUID flags for x86-64 */
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/* see http://www.x86-64.org/lists/discuss/msg02971.html */
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#define REQUIRED_MASK1 ((1<<0)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<8)|\
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(1<<13)|(1<<15)|(1<<24)|(1<<25)|(1<<26))
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#define REQUIRED_MASK2 (1<<29)
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pushfl # check for cpuid
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popl %eax
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movl %eax, %ebx
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xorl $0x200000,%eax
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pushl %eax
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popfl
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pushfl
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popl %eax
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pushl %ebx
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popfl
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cmpl %eax, %ebx
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jz no_longmode
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xorl %eax, %eax # See if cpuid 1 is implemented
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cpuid
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cmpl $0x1, %eax
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jb no_longmode
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movl $0x01, %eax # Does the cpu have what it takes?
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cpuid
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andl $REQUIRED_MASK1, %edx
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xorl $REQUIRED_MASK1, %edx
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jnz no_longmode
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movl $0x80000000, %eax # See if extended cpuid is implemented
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cpuid
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cmpl $0x80000001, %eax
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jb no_longmode
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movl $0x80000001, %eax # Does the cpu have what it takes?
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cpuid
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andl $REQUIRED_MASK2, %edx
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xorl $REQUIRED_MASK2, %edx
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jnz no_longmode
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ret # The cpu supports long mode
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no_longmode:
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hlt
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jmp no_longmode
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#include "verify_cpu.S"
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# Careful these need to be in the same 64K segment as the above;
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tidt:
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110
arch/x86_64/kernel/verify_cpu.S
Normal file
110
arch/x86_64/kernel/verify_cpu.S
Normal file
@ -0,0 +1,110 @@
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/*
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*
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* verify_cpu.S - Code for cpu long mode and SSE verification. This
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* code has been borrowed from boot/setup.S and was introduced by
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* Andi Kleen.
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*
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* Copyright (c) 2007 Andi Kleen (ak@suse.de)
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* Copyright (c) 2007 Eric Biederman (ebiederm@xmission.com)
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* Copyright (c) 2007 Vivek Goyal (vgoyal@in.ibm.com)
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*
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* This source code is licensed under the GNU General Public License,
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* Version 2. See the file COPYING for more details.
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*
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* This is a common code for verification whether CPU supports
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* long mode and SSE or not. It is not called directly instead this
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* file is included at various places and compiled in that context.
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* Following are the current usage.
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*
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* This file is included by both 16bit and 32bit code.
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*
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* arch/x86_64/boot/setup.S : Boot cpu verification (16bit)
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* arch/x86_64/boot/compressed/head.S: Boot cpu verification (32bit)
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* arch/x86_64/kernel/trampoline.S: secondary processor verfication (16bit)
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* arch/x86_64/kernel/acpi/wakeup.S:Verfication at resume (16bit)
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*
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* verify_cpu, returns the status of cpu check in register %eax.
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* 0: Success 1: Failure
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*
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* The caller needs to check for the error code and take the action
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* appropriately. Either display a message or halt.
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*/
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verify_cpu:
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pushfl # Save caller passed flags
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pushl $0 # Kill any dangerous flags
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popfl
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/* minimum CPUID flags for x86-64 */
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/* see http://www.x86-64.org/lists/discuss/msg02971.html */
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#define SSE_MASK ((1<<25)|(1<<26))
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#define REQUIRED_MASK1 ((1<<0)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<8)|\
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(1<<13)|(1<<15)|(1<<24))
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#define REQUIRED_MASK2 (1<<29)
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pushfl # standard way to check for cpuid
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popl %eax
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movl %eax,%ebx
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xorl $0x200000,%eax
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pushl %eax
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popfl
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pushfl
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popl %eax
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cmpl %eax,%ebx
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jz verify_cpu_no_longmode # cpu has no cpuid
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movl $0x0,%eax # See if cpuid 1 is implemented
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cpuid
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cmpl $0x1,%eax
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jb verify_cpu_no_longmode # no cpuid 1
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xor %di,%di
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cmpl $0x68747541,%ebx # AuthenticAMD
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jnz verify_cpu_noamd
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cmpl $0x69746e65,%edx
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jnz verify_cpu_noamd
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cmpl $0x444d4163,%ecx
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jnz verify_cpu_noamd
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mov $1,%di # cpu is from AMD
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verify_cpu_noamd:
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movl $0x1,%eax # Does the cpu have what it takes
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cpuid
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andl $REQUIRED_MASK1,%edx
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xorl $REQUIRED_MASK1,%edx
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jnz verify_cpu_no_longmode
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movl $0x80000000,%eax # See if extended cpuid is implemented
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cpuid
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cmpl $0x80000001,%eax
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jb verify_cpu_no_longmode # no extended cpuid
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movl $0x80000001,%eax # Does the cpu have what it takes
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cpuid
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andl $REQUIRED_MASK2,%edx
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xorl $REQUIRED_MASK2,%edx
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jnz verify_cpu_no_longmode
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verify_cpu_sse_test:
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movl $1,%eax
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cpuid
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andl $SSE_MASK,%edx
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cmpl $SSE_MASK,%edx
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je verify_cpu_sse_ok
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test %di,%di
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jz verify_cpu_no_longmode # only try to force SSE on AMD
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movl $0xc0010015,%ecx # HWCR
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rdmsr
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btr $15,%eax # enable SSE
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wrmsr
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xor %di,%di # don't loop
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jmp verify_cpu_sse_test # try again
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verify_cpu_no_longmode:
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popfl # Restore caller passed flags
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movl $1,%eax
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ret
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verify_cpu_sse_ok:
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popfl # Restore caller passed flags
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xorl %eax, %eax
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ret
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