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mtd: nand: consolidate redundant flash-based BBT flags

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This patch works with the following three flags from two headers (nand.h
and bbm.h):
  (1) NAND_USE_FLASH_BBT (nand.h)
  (2) NAND_USE_FLASH_BBT_NO_OOB (nand.h)
  (3) NAND_BBT_NO_OOB (bbm.h)

These flags are all related and interdependent, yet they were in
different headers. Flag (2) is simply the combination of (1) and (3) and
can be eliminated.

This patch accomplishes the following:
  * eliminate NAND_USE_FLASH_BBT_NO_OOB (i.e., flag (2))
  * move NAND_USE_FLASH_BBT (i.e., flag (1)) to bbm.h

It's important to note that because (1) and (3) are now both found in
bbm.h, they should NOT be used in the "nand_chip.options" field.

I removed a small section from the mtdnand DocBook because it referes to
NAND_USE_FLASH_BBT in nand.h, which has been moved to bbm.h.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
This commit is contained in:
Brian Norris 2011-05-31 16:31:22 -07:00 committed by Artem Bityutskiy
parent 5fb1549dfc
commit a40f73419f
33 changed files with 65 additions and 58 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Documentation/DocBook/mtdnand.tmpl
View File

@ -572,7 +572,7 @@ static void board_select_chip (struct mtd_info *mtd, int chip)
</para>
<para>
The simplest way to activate the FLASH based bad block table support
is to set the option NAND_USE_FLASH_BBT in the option field of
is to set the option NAND_USE_FLASH_BBT in the bbt_option field of
the nand chip structure before calling nand_scan(). For AG-AND
chips is this done by default.
This activates the default FLASH based bad block table functionality
@ -1158,9 +1158,6 @@ in this page</entry>
These constants are defined in nand.h. They are ored together to describe
the functionality.
<programlisting>
/* Use a flash based bad block table. This option is parsed by the
* default bad block table function (nand_default_bbt). */
#define NAND_USE_FLASH_BBT 0x00010000
/* The hw ecc generator provides a syndrome instead a ecc value on read
* This can only work if we have the ecc bytes directly behind the
* data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */

2
arch/arm/mach-davinci/board-da830-evm.c
View File

@ -377,7 +377,7 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = {
.nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
.ecc_mode = NAND_ECC_HW,
.ecc_bits = 4,
.options = NAND_USE_FLASH_BBT,
.bbt_options = NAND_USE_FLASH_BBT,
.bbt_td = &da830_evm_nand_bbt_main_descr,
.bbt_md = &da830_evm_nand_bbt_mirror_descr,
.timing = &da830_evm_nandflash_timing,

2
arch/arm/mach-davinci/board-da850-evm.c
View File

@ -225,7 +225,7 @@ static struct davinci_nand_pdata da850_evm_nandflash_data = {
.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
.ecc_mode = NAND_ECC_HW,
.ecc_bits = 4,
.options = NAND_USE_FLASH_BBT,
.bbt_options = NAND_USE_FLASH_BBT,
.timing = &da850_evm_nandflash_timing,
};

2
arch/arm/mach-davinci/board-dm355-evm.c
View File

@ -77,7 +77,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
.parts = davinci_nand_partitions,
.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
.ecc_mode = NAND_ECC_HW,
.options = NAND_USE_FLASH_BBT,
.bbt_options = NAND_USE_FLASH_BBT,
.ecc_bits = 4,
};

2
arch/arm/mach-davinci/board-dm355-leopard.c
View File

@ -74,7 +74,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
.parts = davinci_nand_partitions,
.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
.ecc_mode = NAND_ECC_HW_SYNDROME,
.options = NAND_USE_FLASH_BBT,
.bbt_options = NAND_USE_FLASH_BBT,
};
static struct resource davinci_nand_resources[] = {

2
arch/arm/mach-davinci/board-dm365-evm.c
View File

@ -139,7 +139,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
.parts = davinci_nand_partitions,
.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
.ecc_mode = NAND_ECC_HW,
.options = NAND_USE_FLASH_BBT,
.bbt_options = NAND_USE_FLASH_BBT,
.ecc_bits = 4,
};

2
arch/arm/mach-davinci/board-dm644x-evm.c
View File

@ -150,7 +150,7 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = {
.parts = davinci_evm_nandflash_partition,
.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
.ecc_mode = NAND_ECC_HW,
.options = NAND_USE_FLASH_BBT,
.bbt_options = NAND_USE_FLASH_BBT,
.timing = &davinci_evm_nandflash_timing,
};

3
arch/arm/mach-davinci/board-mityomapl138.c
View File

@ -396,7 +396,8 @@ static struct davinci_nand_pdata mityomapl138_nandflash_data = {
.parts = mityomapl138_nandflash_partition,
.nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
.ecc_mode = NAND_ECC_HW,
.options = NAND_USE_FLASH_BBT | NAND_BUSWIDTH_16,
.bbt_options = NAND_USE_FLASH_BBT,
.options = NAND_BUSWIDTH_16,
.ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */
};

2
arch/arm/mach-davinci/board-neuros-osd2.c
View File

@ -87,7 +87,7 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
.parts = davinci_ntosd2_nandflash_partition,
.nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
.ecc_mode = NAND_ECC_HW,
.options = NAND_USE_FLASH_BBT,
.bbt_options = NAND_USE_FLASH_BBT,
};
static struct resource davinci_ntosd2_nandflash_resource[] = {

2
arch/arm/mach-davinci/board-tnetv107x-evm.c
View File

@ -144,7 +144,7 @@ static struct davinci_nand_pdata nand_config = {
.parts = nand_partitions,
.nr_parts = ARRAY_SIZE(nand_partitions),
.ecc_mode = NAND_ECC_HW,
.options = NAND_USE_FLASH_BBT,
.bbt_options = NAND_USE_FLASH_BBT,
.ecc_bits = 1,
};

4
arch/arm/mach-davinci/include/mach/nand.h
View File

@ -74,8 +74,10 @@ struct davinci_nand_pdata { /* platform_data */
nand_ecc_modes_t ecc_mode;
u8 ecc_bits;
/* e.g. NAND_BUSWIDTH_16 or NAND_USE_FLASH_BBT */
/* e.g. NAND_BUSWIDTH_16 */
unsigned options;
/* e.g. NAND_USE_FLASH_BBT */
unsigned bbt_options;
/* Main and mirror bbt descriptor overrides */
struct nand_bbt_descr *bbt_td;

2
arch/arm/mach-orion5x/ts78xx-setup.c
View File

@ -275,7 +275,7 @@ static struct platform_nand_data ts78xx_ts_nand_data = {
.partitions = ts78xx_ts_nand_parts,
.nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts),
.chip_delay = 15,
.options = NAND_USE_FLASH_BBT,
.bbt_options = NAND_USE_FLASH_BBT,
},
.ctrl = {
/*

2
arch/cris/arch-v32/drivers/mach-a3/nandflash.c
View File

@ -163,7 +163,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
this->ecc.mode = NAND_ECC_SOFT;
/* Enable the following for a flash based bad block table */
/* this->options = NAND_USE_FLASH_BBT; */
/* this->bbt_options = NAND_USE_FLASH_BBT; */
/* Scan to find existence of the device */
if (nand_scan(crisv32_mtd, 1)) {

2
arch/cris/arch-v32/drivers/mach-fs/nandflash.c
View File

@ -154,7 +154,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
this->ecc.mode = NAND_ECC_SOFT;
/* Enable the following for a flash based bad block table */
/* this->options = NAND_USE_FLASH_BBT; */
/* this->bbt_options = NAND_USE_FLASH_BBT; */
/* Scan to find existence of the device */
if (nand_scan(crisv32_mtd, 1)) {

2
drivers/mtd/nand/atmel_nand.c
View File

@ -583,7 +583,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
if (on_flash_bbt) {
printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
nand_chip->options |= NAND_USE_FLASH_BBT;
nand_chip->bbt_options |= NAND_USE_FLASH_BBT;
}
if (!cpu_has_dma())

4
drivers/mtd/nand/autcpu12.c
View File

@ -172,9 +172,9 @@ static int __init autcpu12_init(void)
/* Enable the following for a flash based bad block table */
/*
this->options = NAND_USE_FLASH_BBT;
this->bbt_options = NAND_USE_FLASH_BBT;
*/
this->options = NAND_USE_FLASH_BBT;
this->bbt_options = NAND_USE_FLASH_BBT;
/* Scan to find existence of the device */
if (nand_scan(autcpu12_mtd, 1)) {

2
drivers/mtd/nand/bcm_umi_nand.c
View File

@ -474,7 +474,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
#if NAND_ECC_BCH
if (board_mtd->writesize > 512) {
if (this->options & NAND_USE_FLASH_BBT)
if (this->bbt_options & NAND_USE_FLASH_BBT)
largepage_bbt.options = NAND_BBT_SCAN2NDPAGE;
this->badblock_pattern = &largepage_bbt;
}

3
drivers/mtd/nand/cafe_nand.c
View File

@ -686,7 +686,8 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
cafe->nand.chip_delay = 0;
/* Enable the following for a flash based bad block table */
cafe->nand.options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR | NAND_OWN_BUFFERS;
cafe->nand.bbt_options = NAND_USE_FLASH_BBT;
cafe->nand.options = NAND_NO_AUTOINCR | NAND_OWN_BUFFERS;
if (skipbbt) {
cafe->nand.options |= NAND_SKIP_BBTSCAN;

3
drivers/mtd/nand/cs553x_nand.c
View File

@ -239,7 +239,8 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
this->ecc.correct = nand_correct_data;
/* Enable the following for a flash based bad block table */
this->options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR;
this->bbt_options = NAND_USE_FLASH_BBT;
this->options = NAND_NO_AUTOINCR;
/* Scan to find existence of the device */
if (nand_scan(new_mtd, 1)) {

4
drivers/mtd/nand/davinci_nand.c
View File

@ -581,7 +581,9 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
info->chip.chip_delay = 0;
info->chip.select_chip = nand_davinci_select_chip;
/* options such as NAND_USE_FLASH_BBT or 16-bit widths */
/* options such as NAND_USE_FLASH_BBT */
info->chip.bbt_options = pdata->bbt_options;
/* options such as 16-bit widths */
info->chip.options = pdata->options;
info->chip.bbt_td = pdata->bbt_td;
info->chip.bbt_md = pdata->bbt_md;

3
drivers/mtd/nand/denali.c
View File

@ -1577,7 +1577,8 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
denali->nand.bbt_md = &bbt_mirror_descr;
/* skip the scan for now until we have OOB read and write support */
denali->nand.options |= NAND_USE_FLASH_BBT | NAND_SKIP_BBTSCAN;
denali->nand.bbt_options |= NAND_USE_FLASH_BBT;
denali->nand.options |= NAND_SKIP_BBTSCAN;
denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
/* Denali Controller only support 15bit and 8bit ECC in MRST,

2
drivers/mtd/nand/diskonchip.c
View File

@ -1652,7 +1652,7 @@ static int __init doc_probe(unsigned long physadr)
nand->ecc.mode = NAND_ECC_HW_SYNDROME;
nand->ecc.size = 512;
nand->ecc.bytes = 6;
nand->options = NAND_USE_FLASH_BBT;
nand->bbt_options = NAND_USE_FLASH_BBT;
doc->physadr = physadr;
doc->virtadr = virtadr;

4
drivers/mtd/nand/fsl_elbc_nand.c
View File

@ -791,8 +791,8 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv)
chip->bbt_md = &bbt_mirror_descr;
/* set up nand options */
chip->options = NAND_NO_READRDY | NAND_NO_AUTOINCR |
NAND_USE_FLASH_BBT;
chip->options = NAND_NO_READRDY | NAND_NO_AUTOINCR;
chip->bbt_options = NAND_USE_FLASH_BBT;
chip->controller = &elbc_fcm_ctrl->controller;
chip->priv = priv;

3
drivers/mtd/nand/mpc5121_nfc.c
View File

@ -735,7 +735,8 @@ static int __devinit mpc5121_nfc_probe(struct platform_device *op)
chip->write_buf = mpc5121_nfc_write_buf;
chip->verify_buf = mpc5121_nfc_verify_buf;
chip->select_chip = mpc5121_nfc_select_chip;
chip->options = NAND_NO_AUTOINCR | NAND_USE_FLASH_BBT;
chip->options = NAND_NO_AUTOINCR;
chip->bbt_options = NAND_USE_FLASH_BBT;
chip->ecc.mode = NAND_ECC_SOFT;
/* Support external chip-select logic on ADS5121 board */

2
drivers/mtd/nand/mxc_nand.c
View File

@ -1179,7 +1179,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
this->bbt_td = &bbt_main_descr;
this->bbt_md = &bbt_mirror_descr;
/* update flash based bbt */
this->options |= NAND_USE_FLASH_BBT;
this->bbt_options |= NAND_USE_FLASH_BBT;
}
init_completion(&host->op_completion);

2
drivers/mtd/nand/nand_base.c
View File

@ -405,7 +405,7 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
/* Do we have a flash based bad block table ? */
if (chip->options & NAND_USE_FLASH_BBT)
if (chip->bbt_options & NAND_USE_FLASH_BBT)
ret = nand_update_bbt(mtd, ofs);
else {
nand_get_device(chip, mtd, FL_WRITING);

20
drivers/mtd/nand/nand_bbt.c
View File

@ -36,9 +36,9 @@
* The table is marked in the OOB area with an ident pattern and a version
* number which indicates which of both tables is more up to date. If the NAND
* controller needs the complete OOB area for the ECC information then the
* option NAND_USE_FLASH_BBT_NO_OOB should be used: it moves the ident pattern
* and the version byte into the data area and the OOB area will remain
* untouched.
* option NAND_BBT_NO_OOB should be used (along with NAND_USE_FLASH_BBT, of
* course): it moves the ident pattern and the version byte into the data area
* and the OOB area will remain untouched.
*
* The table uses 2 bits per block
* 11b: block is good
@ -1082,16 +1082,16 @@ static void verify_bbt_descr(struct mtd_info *mtd, struct nand_bbt_descr *bd)
pattern_len = bd->len;
bits = bd->options & NAND_BBT_NRBITS_MSK;
BUG_ON((this->options & NAND_USE_FLASH_BBT_NO_OOB) &&
!(this->options & NAND_USE_FLASH_BBT));
BUG_ON((this->bbt_options & NAND_BBT_NO_OOB) &&
!(this->bbt_options & NAND_USE_FLASH_BBT));
BUG_ON(!bits);
if (bd->options & NAND_BBT_VERSION)
pattern_len++;
if (bd->options & NAND_BBT_NO_OOB) {
BUG_ON(!(this->options & NAND_USE_FLASH_BBT));
BUG_ON(!(this->options & NAND_USE_FLASH_BBT_NO_OOB));
BUG_ON(!(this->bbt_options & NAND_USE_FLASH_BBT));
BUG_ON(!(this->bbt_options & NAND_BBT_NO_OOB));
BUG_ON(bd->offs);
if (bd->options & NAND_BBT_VERSION)
BUG_ON(bd->veroffs != bd->len);
@ -1357,15 +1357,15 @@ int nand_default_bbt(struct mtd_info *mtd)
this->bbt_td = &bbt_main_descr;
this->bbt_md = &bbt_mirror_descr;
}
this->options |= NAND_USE_FLASH_BBT;
this->bbt_options |= NAND_USE_FLASH_BBT;
return nand_scan_bbt(mtd, &agand_flashbased);
}
/* Is a flash based bad block table requested ? */
if (this->options & NAND_USE_FLASH_BBT) {
if (this->bbt_options & NAND_USE_FLASH_BBT) {
/* Use the default pattern descriptors */
if (!this->bbt_td) {
if (this->options & NAND_USE_FLASH_BBT_NO_OOB) {
if (this->bbt_options & NAND_BBT_NO_OOB) {
this->bbt_td = &bbt_main_no_bbt_descr;
this->bbt_md = &bbt_mirror_no_bbt_descr;
} else {

4
drivers/mtd/nand/nandsim.c
View File

@ -2273,9 +2273,9 @@ static int __init ns_init_module(void)
switch (bbt) {
case 2:
chip->options |= NAND_USE_FLASH_BBT_NO_OOB;
chip->bbt_options |= NAND_BBT_NO_OOB;
case 1:
chip->options |= NAND_USE_FLASH_BBT;
chip->bbt_options |= NAND_USE_FLASH_BBT;
case 0:
break;
default:

3
drivers/mtd/nand/pasemi_nand.c
View File

@ -155,7 +155,8 @@ static int __devinit pasemi_nand_probe(struct platform_device *ofdev)
chip->ecc.mode = NAND_ECC_SOFT;
/* Enable the following for a flash based bad block table */
chip->options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR;
chip->options = NAND_NO_AUTOINCR;
chip->bbt_options = NAND_USE_FLASH_BBT;
/* Scan to find existence of the device */
if (nand_scan(pasemi_nand_mtd, 1)) {

1
drivers/mtd/nand/plat_nand.c
View File

@ -79,6 +79,7 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)
data->chip.read_buf = pdata->ctrl.read_buf;
data->chip.chip_delay = pdata->chip.chip_delay;
data->chip.options |= pdata->chip.options;
data->chip.bbt_options |= pdata->chip.bbt_options;
data->chip.ecc.hwctl = pdata->ctrl.hwcontrol;
data->chip.ecc.layout = pdata->chip.ecclayout;

6
drivers/mtd/nand/s3c2410.c
View File

@ -880,8 +880,10 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
/* If you use u-boot BBT creation code, specifying this flag will
* let the kernel fish out the BBT from the NAND, and also skip the
* full NAND scan that can take 1/2s or so. Little things... */
if (set->flash_bbt)
chip->options |= NAND_USE_FLASH_BBT | NAND_SKIP_BBTSCAN;
if (set->flash_bbt) {
chip->bbt_options |= NAND_USE_FLASH_BBT;
chip->options |= NAND_SKIP_BBTSCAN;
}
}
/**

9
include/linux/mtd/bbm.h
View File

@ -100,8 +100,13 @@ struct nand_bbt_descr {
#define NAND_BBT_SCANLASTPAGE 0x00008000
/* The nand_bbt_descr was created dynamicaly and must be freed */
#define NAND_BBT_DYNAMICSTRUCT 0x00200000
/* The bad block table does not OOB for marker */
#define NAND_BBT_NO_OOB 0x00400000
/*
* Use a flash based bad block table. By default, OOB identifier is saved in
* OOB area. This option is passed to the default bad block table function.
*/
#define NAND_USE_FLASH_BBT 0x00040000
/* Do not store flash based bad block table in OOB area; store it in-band */
#define NAND_BBT_NO_OOB 0x00080000
/* The maximum number of blocks to scan for a bbt */
#define NAND_BBT_SCAN_MAXBLOCKS 4

12
include/linux/mtd/nand.h
View File

@ -219,11 +219,6 @@ typedef enum {
#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
/* Non chip related options */
/*
* Use a flash based bad block table. OOB identifier is saved in OOB area.
* This option is passed to the default bad block table function.
*/
#define NAND_USE_FLASH_BBT 0x00010000
/* This option skips the bbt scan during initialization. */
#define NAND_SKIP_BBTSCAN 0x00020000
/*
@ -233,11 +228,6 @@ typedef enum {
#define NAND_OWN_BUFFERS 0x00040000
/* Chip may not exist, so silence any errors in scan */
#define NAND_SCAN_SILENT_NODEV 0x00080000
/*
* If passed additionally to NAND_USE_FLASH_BBT then BBT code will not touch
* the OOB area.
*/
#define NAND_USE_FLASH_BBT_NO_OOB 0x00800000
/* Create an empty BBT with no vendor information if the BBT is available */
#define NAND_CREATE_EMPTY_BBT 0x01000000
@ -615,6 +605,7 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
* @partitions: mtd partition list
* @chip_delay: R/B delay value in us
* @options: Option flags, e.g. 16bit buswidth
* @bbt_options: BBT option flags, e.g. NAND_BBT_USE_FLASH
* @ecclayout: ecc layout info structure
* @part_probe_types: NULL-terminated array of probe types
* @set_parts: platform specific function to set partitions
@ -628,6 +619,7 @@ struct platform_nand_chip {
struct nand_ecclayout *ecclayout;
int chip_delay;
unsigned int options;
unsigned int bbt_options;
const char **part_probe_types;
void (*set_parts)(uint64_t size, struct platform_nand_chip *chip);
void *priv;