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bnx2x: Add CL37 BAM for Warpcore
Add CL37 BAM support according to configuration. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3564,7 +3564,7 @@ static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy,
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static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy,
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struct link_params *params,
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struct link_vars *vars) {
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u16 val16 = 0, lane;
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u16 val16 = 0, lane, bam37 = 0;
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struct bnx2x *bp = params->bp;
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DP(NETIF_MSG_LINK, "Enable Auto Negotiation for KR\n");
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/* Check adding advertisement for 1G KX */
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@ -3616,6 +3616,18 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy,
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bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD,
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MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, val16);
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/* Enable CL37 BAM */
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if (REG_RD(bp, params->shmem_base +
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offsetof(struct shmem_region, dev_info.
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port_hw_config[params->port].default_cfg)) &
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PORT_HW_CFG_ENABLE_BAM_ON_KR_ENABLED) {
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bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,
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MDIO_WC_REG_DIGITAL6_MP5_NEXTPAGECTRL, &bam37);
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bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
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MDIO_WC_REG_DIGITAL6_MP5_NEXTPAGECTRL, bam37 | 1);
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DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n");
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}
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/* Advertise pause */
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bnx2x_ext_phy_set_pause(params, phy, vars);
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@ -6889,6 +6889,7 @@ Theotherbitsarereservedandshouldbezero*/
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#define MDIO_WC_REG_DIGITAL5_MISC6 0x8345
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#define MDIO_WC_REG_DIGITAL5_MISC7 0x8349
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#define MDIO_WC_REG_DIGITAL5_ACTUAL_SPEED 0x834e
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#define MDIO_WC_REG_DIGITAL6_MP5_NEXTPAGECTRL 0x8350
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#define MDIO_WC_REG_CL49_USERB0_CTRL 0x8368
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#define MDIO_WC_REG_TX66_CONTROL 0x83b0
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#define MDIO_WC_REG_RX66_CONTROL 0x83c0
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