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mtd: cleanup nand.h
- *var instead of * var - proper multiline comment - func(args) instead of func (args) - 80 lines So from |total: 2 errors, 37 warnings, 654 lines checked we got to one warning. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Sebastian Andrzej Siewior
David Woodhouse
parent
766f271a63
commit
a0491fc4d4
@ -27,15 +27,17 @@
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struct mtd_info;
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struct nand_flash_dev;
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/* Scan and identify a NAND device */
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extern int nand_scan (struct mtd_info *mtd, int max_chips);
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/* Separate phases of nand_scan(), allowing board driver to intervene
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* and override command or ECC setup according to flash type */
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extern int nand_scan(struct mtd_info *mtd, int max_chips);
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/*
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* Separate phases of nand_scan(), allowing board driver to intervene
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* and override command or ECC setup according to flash type.
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*/
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extern int nand_scan_ident(struct mtd_info *mtd, int max_chips,
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struct nand_flash_dev *table);
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extern int nand_scan_tail(struct mtd_info *mtd);
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/* Free resources held by the NAND device */
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extern void nand_release (struct mtd_info *mtd);
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extern void nand_release(struct mtd_info *mtd);
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/* Internal helper for board drivers which need to override command function */
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extern void nand_wait_ready(struct mtd_info *mtd);
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@ -49,7 +51,8 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
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/* The maximum number of NAND chips in an array */
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#define NAND_MAX_CHIPS 8
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/* This constant declares the max. oobsize / page, which
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/*
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* This constant declares the max. oobsize / page, which
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* is supported now. If you add a chip with bigger oobsize/page
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* adjust this accordingly.
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*/
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@ -153,9 +156,10 @@ typedef enum {
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#define NAND_GET_DEVICE 0x80
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/* Option constants for bizarre disfunctionality and real
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* features
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*/
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/*
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* Option constants for bizarre disfunctionality and real
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* features.
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*/
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/* Chip can not auto increment pages */
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#define NAND_NO_AUTOINCR 0x00000001
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/* Buswitdh is 16 bit */
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@ -166,19 +170,27 @@ typedef enum {
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#define NAND_CACHEPRG 0x00000008
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/* Chip has copy back function */
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#define NAND_COPYBACK 0x00000010
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/* AND Chip which has 4 banks and a confusing page / block
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* assignment. See Renesas datasheet for further information */
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/*
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* AND Chip which has 4 banks and a confusing page / block
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* assignment. See Renesas datasheet for further information.
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*/
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#define NAND_IS_AND 0x00000020
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/* Chip has a array of 4 pages which can be read without
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* additional ready /busy waits */
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/*
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* Chip has a array of 4 pages which can be read without
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* additional ready /busy waits.
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*/
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#define NAND_4PAGE_ARRAY 0x00000040
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/* Chip requires that BBT is periodically rewritten to prevent
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/*
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* Chip requires that BBT is periodically rewritten to prevent
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* bits from adjacent blocks from 'leaking' in altering data.
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* This happens with the Renesas AG-AND chips, possibly others. */
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* This happens with the Renesas AG-AND chips, possibly others.
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*/
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#define BBT_AUTO_REFRESH 0x00000080
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/* Chip does not require ready check on read. True
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/*
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* Chip does not require ready check on read. True
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* for all large page devices, as they do not support
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* autoincrement.*/
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* autoincrement.
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*/
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#define NAND_NO_READRDY 0x00000100
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/* Chip does not allow subpage writes */
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#define NAND_NO_SUBPAGE_WRITE 0x00000200
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@ -213,8 +225,10 @@ typedef enum {
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#define NAND_USE_FLASH_BBT 0x00010000
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/* This option skips the bbt scan during initialization. */
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#define NAND_SKIP_BBTSCAN 0x00020000
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/* This option is defined if the board driver allocates its own buffers
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(e.g. because it needs them DMA-coherent */
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/*
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* This option is defined if the board driver allocates its own buffers
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* (e.g. because it needs them DMA-coherent).
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*/
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#define NAND_OWN_BUFFERS 0x00040000
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/* Chip may not exist, so silence any errors in scan */
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#define NAND_SCAN_SILENT_NODEV 0x00080000
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@ -304,8 +318,9 @@ struct nand_onfi_params {
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* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
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* @lock: protection lock
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* @active: the mtd device which holds the controller currently
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* @wq: wait queue to sleep on if a NAND operation is in progress
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* used instead of the per chip wait queue when a hw controller is available
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* @wq: wait queue to sleep on if a NAND operation is in
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* progress used instead of the per chip wait queue
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* when a hw controller is available.
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*/
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struct nand_hw_control {
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spinlock_t lock;
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@ -329,9 +344,11 @@ struct nand_hw_control {
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* @correct: function for ecc correction, matching to ecc generator (sw/hw)
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* @read_page_raw: function to read a raw page without ECC
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* @write_page_raw: function to write a raw page without ECC
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* @read_page: function to read a page according to the ecc generator requirements
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* @read_page: function to read a page according to the ecc generator
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* requirements.
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* @read_subpage: function to read parts of the page covered by ECC.
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* @write_page: function to write a page according to the ecc generator requirements
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* @write_page: function to write a page according to the ecc generator
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* requirements.
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* @read_oob: function to read chip OOB data
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* @write_oob: function to write chip OOB data
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*/
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@ -393,13 +410,16 @@ struct nand_buffers {
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/**
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* struct nand_chip - NAND Private Flash Chip Data
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* @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
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* @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
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* @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the
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* flash device
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* @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the
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* flash device.
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* @read_byte: [REPLACEABLE] read one byte from the chip
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* @read_word: [REPLACEABLE] read one word from the chip
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* @write_buf: [REPLACEABLE] write data from the buffer to the chip
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* @read_buf: [REPLACEABLE] read data from the chip into the buffer
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* @verify_buf: [REPLACEABLE] verify buffer contents against the chip data
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* @verify_buf: [REPLACEABLE] verify buffer contents against the chip
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* data.
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* @select_chip: [REPLACEABLE] select chip nr
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* @block_bad: [REPLACEABLE] check, if the block is bad
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* @block_markbad: [REPLACEABLE] mark the block bad
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@ -409,45 +429,60 @@ struct nand_buffers {
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* mtd->oobsize, mtd->writesize and so on.
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* @id_data contains the 8 bytes values of NAND_CMD_READID.
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* Return with the bus width.
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* @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
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* If set to NULL no access to ready/busy is available and the ready/busy information
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* is read from the chip status register
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* @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
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* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
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* @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing
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* device ready/busy line. If set to NULL no access to
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* ready/busy is available and the ready/busy information
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* is read from the chip status register.
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* @cmdfunc: [REPLACEABLE] hardwarespecific function for writing
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* commands to the chip.
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* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
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* ready.
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* @ecc: [BOARDSPECIFIC] ecc control ctructure
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* @buffers: buffer structure for read/write
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* @hwcontrol: platform-specific hardware control structure
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* @ops: oob operation operands
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* @erase_cmd: [INTERN] erase command write function, selectable due to AND support
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* @erase_cmd: [INTERN] erase command write function, selectable due
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* to AND support.
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* @scan_bbt: [REPLACEABLE] function to scan bad block table
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* @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
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* @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering
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* data from array to read regs (tR).
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* @state: [INTERN] the current state of the NAND device
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* @oob_poi: poison value buffer
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* @page_shift: [INTERN] number of address bits in a page (column address bits)
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* @page_shift: [INTERN] number of address bits in a page (column
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* address bits).
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* @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
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* @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
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* @chip_shift: [INTERN] number of address bits in one chip
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* @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
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* special functionality. See the defines for further explanation
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* @badblockpos: [INTERN] position of the bad block marker in the oob area
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* @options: [BOARDSPECIFIC] various chip options. They can partly
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* be set to inform nand_scan about special functionality.
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* See the defines for further explanation.
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* @badblockpos: [INTERN] position of the bad block marker in the oob
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* area.
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* @cellinfo: [INTERN] MLC/multichip data from chip ident
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* @numchips: [INTERN] number of physical chips
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* @chipsize: [INTERN] the size of one chip for multichip arrays
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* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
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* @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf
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* @pagebuf: [INTERN] holds the pagenumber which is currently in
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* data_buf.
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* @subpagesize: [INTERN] holds the subpagesize
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* @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded), non 0 if ONFI supported
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* @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is supported, 0 otherwise
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* @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded),
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* non 0 if ONFI supported.
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* @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
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* supported, 0 otherwise.
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* @ecclayout: [REPLACEABLE] the default ecc placement scheme
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* @bbt: [INTERN] bad block table pointer
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* @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
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* @bbt_td: [REPLACEABLE] bad block table descriptor for flash
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* lookup.
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* @bbt_md: [REPLACEABLE] bad block table mirror descriptor
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* @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan
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* @controller: [REPLACEABLE] a pointer to a hardware controller structure
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* which is shared among multiple independend devices
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* @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial
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* bad block scan.
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* @controller: [REPLACEABLE] a pointer to a hardware controller
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* structure which is shared among multiple independend
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* devices.
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* @priv: [OPTIONAL] pointer to private chip date
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* @errstat: [OPTIONAL] hardware specific function to perform additional error status checks
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* (determine if errors are correctable)
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* @errstat: [OPTIONAL] hardware specific function to perform
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* additional error status checks (determine if errors are
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* correctable).
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* @write_page: [REPLACEABLE] High-level page write function
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*/
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@ -457,24 +492,32 @@ struct nand_chip {
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uint8_t (*read_byte)(struct mtd_info *mtd);
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u16 (*read_word)(struct mtd_info *mtd);
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void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
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void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
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int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
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void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf,
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int len);
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void (*read_buf)(struct mtd_info *mtd, uint8_t *buf,
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int len);
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int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf,
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int len);
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void (*select_chip)(struct mtd_info *mtd, int chip);
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int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
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int (*block_bad)(struct mtd_info *mtd, loff_t ofs,
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int getchip);
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int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
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void (*cmd_ctrl)(struct mtd_info *mtd, int dat,
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unsigned int ctrl);
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int (*init_size)(struct mtd_info *mtd,
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struct nand_chip *this, u8 *id_data);
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int (*dev_ready)(struct mtd_info *mtd);
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void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
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int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
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void (*cmdfunc)(struct mtd_info *mtd, unsigned command,
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int column, int page_addr);
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int (*waitfunc)(struct mtd_info *mtd,
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struct nand_chip *this);
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void (*erase_cmd)(struct mtd_info *mtd, int page);
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int (*scan_bbt)(struct mtd_info *mtd);
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int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
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int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
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const uint8_t *buf, int page, int cached, int raw);
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int (*errstat)(struct mtd_info *mtd, struct nand_chip *this,
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int state, int status, int page);
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int (*write_page)(struct mtd_info *mtd,
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struct nand_chip *chip, const uint8_t *buf, int page,
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int cached, int raw);
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int chip_delay;
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unsigned int options;
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@ -557,7 +600,7 @@ struct nand_flash_dev {
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*/
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struct nand_manufacturers {
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int id;
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char * name;
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char *name;
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};
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extern struct nand_flash_dev nand_flash_ids[];
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@ -570,7 +613,7 @@ extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt);
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extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
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int allowbbt);
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extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t * retlen, uint8_t * buf);
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size_t *retlen, uint8_t *buf);
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/**
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* struct platform_nand_chip - chip level device structure
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