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x86/db: Split out dr6/7 handling
DR6/7 should be handled before nmi_enter() is invoked and restore after nmi_exit() to minimize the exposure. Split it out into helper inlines and bring it into the correct order. Signed-off-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com> Acked-by: Andy Lutomirski <luto@kernel.org> Link: https://lkml.kernel.org/r/20200505135314.808628211@linutronix.de
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@ -464,7 +464,7 @@ static int hw_breakpoint_handler(struct die_args *args)
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{
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int i, cpu, rc = NOTIFY_STOP;
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struct perf_event *bp;
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unsigned long dr7, dr6;
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unsigned long dr6;
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unsigned long *dr6_p;
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/* The DR6 value is pointed by args->err */
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@ -479,9 +479,6 @@ static int hw_breakpoint_handler(struct die_args *args)
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if ((dr6 & DR_TRAP_BITS) == 0)
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return NOTIFY_DONE;
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get_debugreg(dr7, 7);
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/* Disable breakpoints during exception handling */
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set_debugreg(0UL, 7);
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/*
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* Assert that local interrupts are disabled
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* Reset the DRn bits in the virtualized register value.
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@ -538,7 +535,6 @@ static int hw_breakpoint_handler(struct die_args *args)
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(dr6 & (~DR_TRAP_BITS)))
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rc = NOTIFY_DONE;
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set_debugreg(dr7, 7);
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put_cpu();
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return rc;
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@ -700,6 +700,57 @@ static bool is_sysenter_singlestep(struct pt_regs *regs)
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#endif
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}
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static __always_inline void debug_enter(unsigned long *dr6, unsigned long *dr7)
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{
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/*
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* Disable breakpoints during exception handling; recursive exceptions
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* are exceedingly 'fun'.
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*
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* Since this function is NOKPROBE, and that also applies to
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* HW_BREAKPOINT_X, we can't hit a breakpoint before this (XXX except a
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* HW_BREAKPOINT_W on our stack)
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*
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* Entry text is excluded for HW_BP_X and cpu_entry_area, which
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* includes the entry stack is excluded for everything.
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*/
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get_debugreg(*dr7, 7);
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set_debugreg(0, 7);
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/*
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* Ensure the compiler doesn't lower the above statements into
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* the critical section; disabling breakpoints late would not
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* be good.
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*/
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barrier();
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/*
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* The Intel SDM says:
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*
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* Certain debug exceptions may clear bits 0-3. The remaining
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* contents of the DR6 register are never cleared by the
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* processor. To avoid confusion in identifying debug
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* exceptions, debug handlers should clear the register before
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* returning to the interrupted task.
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*
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* Keep it simple: clear DR6 immediately.
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*/
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get_debugreg(*dr6, 6);
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set_debugreg(0, 6);
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/* Filter out all the reserved bits which are preset to 1 */
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*dr6 &= ~DR6_RESERVED;
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}
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static __always_inline void debug_exit(unsigned long dr7)
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{
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/*
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* Ensure the compiler doesn't raise this statement into
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* the critical section; enabling breakpoints early would
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* not be good.
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*/
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barrier();
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set_debugreg(dr7, 7);
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}
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/*
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* Our handling of the processor debug registers is non-trivial.
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* We do not clear them on entry and exit from the kernel. Therefore
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@ -727,29 +778,14 @@ static bool is_sysenter_singlestep(struct pt_regs *regs)
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dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
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{
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struct task_struct *tsk = current;
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unsigned long dr6, dr7;
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int user_icebp = 0;
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unsigned long dr6;
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int si_code;
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debug_enter(&dr6, &dr7);
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nmi_enter();
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get_debugreg(dr6, 6);
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/*
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* The Intel SDM says:
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*
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* Certain debug exceptions may clear bits 0-3. The remaining
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* contents of the DR6 register are never cleared by the
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* processor. To avoid confusion in identifying debug
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* exceptions, debug handlers should clear the register before
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* returning to the interrupted task.
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*
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* Keep it simple: clear DR6 immediately.
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*/
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set_debugreg(0, 6);
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/* Filter out all the reserved bits which are preset to 1 */
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dr6 &= ~DR6_RESERVED;
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/*
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* The SDM says "The processor clears the BTF flag when it
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* generates a debug exception." Clear TIF_BLOCKSTEP to keep
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@ -786,7 +822,7 @@ dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
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#endif
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if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
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SIGTRAP) == NOTIFY_STOP)
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SIGTRAP) == NOTIFY_STOP)
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goto exit;
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/*
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@ -825,6 +861,7 @@ dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
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exit:
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nmi_exit();
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debug_exit(dr7);
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}
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NOKPROBE_SYMBOL(do_debug);
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