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synced 2024-12-25 21:54:06 +08:00
perf_counter: Rework the perf counter disable/enable
The current disable/enable mechanism is: token = hw_perf_save_disable(); ... /* do bits */ ... hw_perf_restore(token); This works well, provided that the use nests properly. Except we don't. x86 NMI/INT throttling has non-nested use of this, breaking things. Therefore provide a reference counter disable/enable interface, where the first disable disables the hardware, and the last enable enables the hardware again. [ Impact: refactor, simplify the PMU disable/enable logic ] Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
parent
962bf7a66e
commit
9e35ad388b
@ -386,7 +386,7 @@ static void write_mmcr0(struct cpu_hw_counters *cpuhw, unsigned long mmcr0)
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* Disable all counters to prevent PMU interrupts and to allow
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* counters to be added or removed.
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*/
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u64 hw_perf_save_disable(void)
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void hw_perf_disable(void)
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{
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struct cpu_hw_counters *cpuhw;
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unsigned long ret;
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@ -428,7 +428,6 @@ u64 hw_perf_save_disable(void)
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mb();
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}
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local_irq_restore(flags);
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return ret;
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}
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/*
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@ -436,7 +435,7 @@ u64 hw_perf_save_disable(void)
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* If we were previously disabled and counters were added, then
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* put the new config on the PMU.
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*/
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void hw_perf_restore(u64 disable)
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void hw_perf_enable(void)
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{
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struct perf_counter *counter;
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struct cpu_hw_counters *cpuhw;
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@ -448,9 +447,12 @@ void hw_perf_restore(u64 disable)
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int n_lim;
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int idx;
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if (disable)
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return;
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local_irq_save(flags);
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if (!cpuhw->disabled) {
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local_irq_restore(flags);
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return;
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}
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cpuhw = &__get_cpu_var(cpu_hw_counters);
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cpuhw->disabled = 0;
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@ -649,19 +651,18 @@ int hw_perf_group_sched_in(struct perf_counter *group_leader,
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/*
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* Add a counter to the PMU.
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* If all counters are not already frozen, then we disable and
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* re-enable the PMU in order to get hw_perf_restore to do the
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* re-enable the PMU in order to get hw_perf_enable to do the
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* actual work of reconfiguring the PMU.
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*/
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static int power_pmu_enable(struct perf_counter *counter)
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{
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struct cpu_hw_counters *cpuhw;
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unsigned long flags;
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u64 pmudis;
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int n0;
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int ret = -EAGAIN;
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local_irq_save(flags);
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pmudis = hw_perf_save_disable();
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perf_disable();
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/*
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* Add the counter to the list (if there is room)
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@ -685,7 +686,7 @@ static int power_pmu_enable(struct perf_counter *counter)
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ret = 0;
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out:
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hw_perf_restore(pmudis);
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perf_enable();
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local_irq_restore(flags);
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return ret;
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}
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@ -697,11 +698,10 @@ static void power_pmu_disable(struct perf_counter *counter)
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{
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struct cpu_hw_counters *cpuhw;
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long i;
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u64 pmudis;
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unsigned long flags;
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local_irq_save(flags);
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pmudis = hw_perf_save_disable();
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perf_disable();
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power_pmu_read(counter);
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@ -735,7 +735,7 @@ static void power_pmu_disable(struct perf_counter *counter)
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cpuhw->mmcr[0] &= ~(MMCR0_PMXE | MMCR0_FCECE);
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}
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hw_perf_restore(pmudis);
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perf_enable();
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local_irq_restore(flags);
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}
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@ -31,7 +31,6 @@ struct cpu_hw_counters {
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unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
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unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
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unsigned long interrupts;
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u64 throttle_ctrl;
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int enabled;
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};
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@ -42,8 +41,8 @@ struct x86_pmu {
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const char *name;
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int version;
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int (*handle_irq)(struct pt_regs *, int);
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u64 (*save_disable_all)(void);
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void (*restore_all)(u64);
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void (*disable_all)(void);
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void (*enable_all)(void);
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void (*enable)(struct hw_perf_counter *, int);
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void (*disable)(struct hw_perf_counter *, int);
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unsigned eventsel;
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@ -56,6 +55,7 @@ struct x86_pmu {
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int counter_bits;
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u64 counter_mask;
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u64 max_period;
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u64 intel_ctrl;
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};
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static struct x86_pmu x86_pmu __read_mostly;
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@ -311,22 +311,19 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
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return 0;
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}
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static u64 intel_pmu_save_disable_all(void)
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static void intel_pmu_disable_all(void)
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{
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u64 ctrl;
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rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);
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wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0);
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return ctrl;
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}
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static u64 amd_pmu_save_disable_all(void)
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static void amd_pmu_disable_all(void)
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{
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struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
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int enabled, idx;
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int idx;
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if (!cpuc->enabled)
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return;
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enabled = cpuc->enabled;
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cpuc->enabled = 0;
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/*
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* ensure we write the disable before we start disabling the
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@ -334,8 +331,6 @@ static u64 amd_pmu_save_disable_all(void)
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* right thing.
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*/
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barrier();
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if (!enabled)
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goto out;
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for (idx = 0; idx < x86_pmu.num_counters; idx++) {
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u64 val;
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@ -348,37 +343,31 @@ static u64 amd_pmu_save_disable_all(void)
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val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;
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wrmsrl(MSR_K7_EVNTSEL0 + idx, val);
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}
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out:
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return enabled;
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}
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u64 hw_perf_save_disable(void)
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void hw_perf_disable(void)
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{
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if (!x86_pmu_initialized())
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return 0;
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return x86_pmu.save_disable_all();
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return;
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return x86_pmu.disable_all();
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}
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/*
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* Exported because of ACPI idle
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*/
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EXPORT_SYMBOL_GPL(hw_perf_save_disable);
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static void intel_pmu_restore_all(u64 ctrl)
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static void intel_pmu_enable_all(void)
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{
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wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);
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wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
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}
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static void amd_pmu_restore_all(u64 ctrl)
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static void amd_pmu_enable_all(void)
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{
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struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
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int idx;
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cpuc->enabled = ctrl;
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barrier();
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if (!ctrl)
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if (cpuc->enabled)
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return;
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cpuc->enabled = 1;
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barrier();
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for (idx = 0; idx < x86_pmu.num_counters; idx++) {
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u64 val;
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@ -392,16 +381,12 @@ static void amd_pmu_restore_all(u64 ctrl)
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}
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}
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void hw_perf_restore(u64 ctrl)
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void hw_perf_enable(void)
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{
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if (!x86_pmu_initialized())
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return;
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x86_pmu.restore_all(ctrl);
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x86_pmu.enable_all();
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}
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/*
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* Exported because of ACPI idle
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*/
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EXPORT_SYMBOL_GPL(hw_perf_restore);
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static inline u64 intel_pmu_get_status(void)
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{
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@ -735,15 +720,14 @@ static int intel_pmu_handle_irq(struct pt_regs *regs, int nmi)
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int bit, cpu = smp_processor_id();
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u64 ack, status;
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struct cpu_hw_counters *cpuc = &per_cpu(cpu_hw_counters, cpu);
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int ret = 0;
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cpuc->throttle_ctrl = intel_pmu_save_disable_all();
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perf_disable();
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status = intel_pmu_get_status();
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if (!status)
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goto out;
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if (!status) {
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perf_enable();
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return 0;
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}
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ret = 1;
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again:
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inc_irq_stat(apic_perf_irqs);
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ack = status;
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@ -767,19 +751,11 @@ again:
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status = intel_pmu_get_status();
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if (status)
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goto again;
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out:
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/*
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* Restore - do not reenable when global enable is off or throttled:
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*/
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if (cpuc->throttle_ctrl) {
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if (++cpuc->interrupts < PERFMON_MAX_INTERRUPTS) {
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intel_pmu_restore_all(cpuc->throttle_ctrl);
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} else {
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pr_info("CPU#%d: perfcounters: max interrupt rate exceeded! Throttle on.\n", smp_processor_id());
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}
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}
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return ret;
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if (++cpuc->interrupts != PERFMON_MAX_INTERRUPTS)
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perf_enable();
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return 1;
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}
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static int amd_pmu_handle_irq(struct pt_regs *regs, int nmi)
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@ -792,13 +768,11 @@ static int amd_pmu_handle_irq(struct pt_regs *regs, int nmi)
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struct hw_perf_counter *hwc;
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int idx, throttle = 0;
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cpuc->throttle_ctrl = cpuc->enabled;
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cpuc->enabled = 0;
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barrier();
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if (cpuc->throttle_ctrl) {
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if (++cpuc->interrupts >= PERFMON_MAX_INTERRUPTS)
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throttle = 1;
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if (++cpuc->interrupts == PERFMON_MAX_INTERRUPTS) {
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throttle = 1;
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__perf_disable();
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cpuc->enabled = 0;
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barrier();
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}
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for (idx = 0; idx < x86_pmu.num_counters; idx++) {
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@ -824,9 +798,6 @@ next:
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amd_pmu_disable_counter(hwc, idx);
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}
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if (cpuc->throttle_ctrl && !throttle)
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cpuc->enabled = 1;
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return handled;
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}
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@ -839,13 +810,11 @@ void perf_counter_unthrottle(void)
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cpuc = &__get_cpu_var(cpu_hw_counters);
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if (cpuc->interrupts >= PERFMON_MAX_INTERRUPTS) {
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pr_info("CPU#%d: perfcounters: throttle off.\n", smp_processor_id());
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/*
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* Clear them before re-enabling irqs/NMIs again:
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*/
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cpuc->interrupts = 0;
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hw_perf_restore(cpuc->throttle_ctrl);
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perf_enable();
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} else {
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cpuc->interrupts = 0;
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}
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@ -931,8 +900,8 @@ static __read_mostly struct notifier_block perf_counter_nmi_notifier = {
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static struct x86_pmu intel_pmu = {
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.name = "Intel",
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.handle_irq = intel_pmu_handle_irq,
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.save_disable_all = intel_pmu_save_disable_all,
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.restore_all = intel_pmu_restore_all,
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.disable_all = intel_pmu_disable_all,
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.enable_all = intel_pmu_enable_all,
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.enable = intel_pmu_enable_counter,
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.disable = intel_pmu_disable_counter,
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.eventsel = MSR_ARCH_PERFMON_EVENTSEL0,
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@ -951,8 +920,8 @@ static struct x86_pmu intel_pmu = {
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static struct x86_pmu amd_pmu = {
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.name = "AMD",
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.handle_irq = amd_pmu_handle_irq,
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.save_disable_all = amd_pmu_save_disable_all,
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.restore_all = amd_pmu_restore_all,
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.disable_all = amd_pmu_disable_all,
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.enable_all = amd_pmu_enable_all,
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.enable = amd_pmu_enable_counter,
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.disable = amd_pmu_disable_counter,
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.eventsel = MSR_K7_EVNTSEL0,
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@ -1003,6 +972,8 @@ static int intel_pmu_init(void)
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x86_pmu.counter_bits = eax.split.bit_width;
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x86_pmu.counter_mask = (1ULL << eax.split.bit_width) - 1;
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rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
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return 0;
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}
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@ -763,11 +763,9 @@ static int acpi_idle_bm_check(void)
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*/
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static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
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{
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u64 perf_flags;
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/* Don't trace irqs off for idle */
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stop_critical_timings();
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perf_flags = hw_perf_save_disable();
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perf_disable();
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if (cx->entry_method == ACPI_CSTATE_FFH) {
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/* Call into architectural FFH based C-state */
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acpi_processor_ffh_cstate_enter(cx);
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@ -782,7 +780,7 @@ static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
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gets asserted in time to freeze execution properly. */
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unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
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}
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hw_perf_restore(perf_flags);
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perf_enable();
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start_critical_timings();
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}
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@ -544,8 +544,10 @@ extern void perf_counter_exit_task(struct task_struct *child);
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extern void perf_counter_do_pending(void);
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extern void perf_counter_print_debug(void);
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extern void perf_counter_unthrottle(void);
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extern u64 hw_perf_save_disable(void);
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extern void hw_perf_restore(u64 ctrl);
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extern void __perf_disable(void);
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extern bool __perf_enable(void);
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extern void perf_disable(void);
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extern void perf_enable(void);
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extern int perf_counter_task_disable(void);
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extern int perf_counter_task_enable(void);
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extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
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@ -600,8 +602,8 @@ static inline void perf_counter_exit_task(struct task_struct *child) { }
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static inline void perf_counter_do_pending(void) { }
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static inline void perf_counter_print_debug(void) { }
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static inline void perf_counter_unthrottle(void) { }
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static inline void hw_perf_restore(u64 ctrl) { }
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static inline u64 hw_perf_save_disable(void) { return 0; }
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static inline void perf_disable(void) { }
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static inline void perf_enable(void) { }
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static inline int perf_counter_task_disable(void) { return -EINVAL; }
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static inline int perf_counter_task_enable(void) { return -EINVAL; }
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@ -60,8 +60,9 @@ extern __weak const struct pmu *hw_perf_counter_init(struct perf_counter *counte
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return NULL;
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}
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u64 __weak hw_perf_save_disable(void) { return 0; }
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void __weak hw_perf_restore(u64 ctrl) { barrier(); }
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void __weak hw_perf_disable(void) { barrier(); }
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void __weak hw_perf_enable(void) { barrier(); }
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void __weak hw_perf_counter_setup(int cpu) { barrier(); }
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int __weak hw_perf_group_sched_in(struct perf_counter *group_leader,
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struct perf_cpu_context *cpuctx,
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@ -72,6 +73,32 @@ int __weak hw_perf_group_sched_in(struct perf_counter *group_leader,
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void __weak perf_counter_print_debug(void) { }
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static DEFINE_PER_CPU(int, disable_count);
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void __perf_disable(void)
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{
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__get_cpu_var(disable_count)++;
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}
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bool __perf_enable(void)
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{
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return !--__get_cpu_var(disable_count);
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}
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void perf_disable(void)
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{
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__perf_disable();
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hw_perf_disable();
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}
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EXPORT_SYMBOL_GPL(perf_disable); /* ACPI idle */
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void perf_enable(void)
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{
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if (__perf_enable())
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hw_perf_enable();
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}
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EXPORT_SYMBOL_GPL(perf_enable); /* ACPI idle */
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static void
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list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx)
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{
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@ -170,7 +197,6 @@ static void __perf_counter_remove_from_context(void *info)
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struct perf_counter *counter = info;
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struct perf_counter_context *ctx = counter->ctx;
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unsigned long flags;
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u64 perf_flags;
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/*
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* If this is a task context, we need to check whether it is
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@ -191,9 +217,9 @@ static void __perf_counter_remove_from_context(void *info)
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* Protect the list operation against NMI by disabling the
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* counters on a global level. NOP for non NMI based counters.
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*/
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perf_flags = hw_perf_save_disable();
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perf_disable();
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list_del_counter(counter, ctx);
|
||||
hw_perf_restore(perf_flags);
|
||||
perf_enable();
|
||||
|
||||
if (!ctx->task) {
|
||||
/*
|
||||
@ -538,7 +564,6 @@ static void __perf_install_in_context(void *info)
|
||||
struct perf_counter *leader = counter->group_leader;
|
||||
int cpu = smp_processor_id();
|
||||
unsigned long flags;
|
||||
u64 perf_flags;
|
||||
int err;
|
||||
|
||||
/*
|
||||
@ -556,7 +581,7 @@ static void __perf_install_in_context(void *info)
|
||||
* Protect the list operation against NMI by disabling the
|
||||
* counters on a global level. NOP for non NMI based counters.
|
||||
*/
|
||||
perf_flags = hw_perf_save_disable();
|
||||
perf_disable();
|
||||
|
||||
add_counter_to_ctx(counter, ctx);
|
||||
|
||||
@ -596,7 +621,7 @@ static void __perf_install_in_context(void *info)
|
||||
cpuctx->max_pertask--;
|
||||
|
||||
unlock:
|
||||
hw_perf_restore(perf_flags);
|
||||
perf_enable();
|
||||
|
||||
spin_unlock_irqrestore(&ctx->lock, flags);
|
||||
}
|
||||
@ -663,7 +688,6 @@ static void __perf_counter_enable(void *info)
|
||||
struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context);
|
||||
struct perf_counter_context *ctx = counter->ctx;
|
||||
struct perf_counter *leader = counter->group_leader;
|
||||
unsigned long pmuflags;
|
||||
unsigned long flags;
|
||||
int err;
|
||||
|
||||
@ -693,14 +717,14 @@ static void __perf_counter_enable(void *info)
|
||||
if (!group_can_go_on(counter, cpuctx, 1)) {
|
||||
err = -EEXIST;
|
||||
} else {
|
||||
pmuflags = hw_perf_save_disable();
|
||||
perf_disable();
|
||||
if (counter == leader)
|
||||
err = group_sched_in(counter, cpuctx, ctx,
|
||||
smp_processor_id());
|
||||
else
|
||||
err = counter_sched_in(counter, cpuctx, ctx,
|
||||
smp_processor_id());
|
||||
hw_perf_restore(pmuflags);
|
||||
perf_enable();
|
||||
}
|
||||
|
||||
if (err) {
|
||||
@ -795,7 +819,6 @@ void __perf_counter_sched_out(struct perf_counter_context *ctx,
|
||||
struct perf_cpu_context *cpuctx)
|
||||
{
|
||||
struct perf_counter *counter;
|
||||
u64 flags;
|
||||
|
||||
spin_lock(&ctx->lock);
|
||||
ctx->is_active = 0;
|
||||
@ -803,12 +826,12 @@ void __perf_counter_sched_out(struct perf_counter_context *ctx,
|
||||
goto out;
|
||||
update_context_time(ctx);
|
||||
|
||||
flags = hw_perf_save_disable();
|
||||
perf_disable();
|
||||
if (ctx->nr_active) {
|
||||
list_for_each_entry(counter, &ctx->counter_list, list_entry)
|
||||
group_sched_out(counter, cpuctx, ctx);
|
||||
}
|
||||
hw_perf_restore(flags);
|
||||
perf_enable();
|
||||
out:
|
||||
spin_unlock(&ctx->lock);
|
||||
}
|
||||
@ -860,7 +883,6 @@ __perf_counter_sched_in(struct perf_counter_context *ctx,
|
||||
struct perf_cpu_context *cpuctx, int cpu)
|
||||
{
|
||||
struct perf_counter *counter;
|
||||
u64 flags;
|
||||
int can_add_hw = 1;
|
||||
|
||||
spin_lock(&ctx->lock);
|
||||
@ -870,7 +892,7 @@ __perf_counter_sched_in(struct perf_counter_context *ctx,
|
||||
|
||||
ctx->timestamp = perf_clock();
|
||||
|
||||
flags = hw_perf_save_disable();
|
||||
perf_disable();
|
||||
|
||||
/*
|
||||
* First go through the list and put on any pinned groups
|
||||
@ -917,7 +939,7 @@ __perf_counter_sched_in(struct perf_counter_context *ctx,
|
||||
can_add_hw = 0;
|
||||
}
|
||||
}
|
||||
hw_perf_restore(flags);
|
||||
perf_enable();
|
||||
out:
|
||||
spin_unlock(&ctx->lock);
|
||||
}
|
||||
@ -955,7 +977,6 @@ int perf_counter_task_disable(void)
|
||||
struct perf_counter_context *ctx = &curr->perf_counter_ctx;
|
||||
struct perf_counter *counter;
|
||||
unsigned long flags;
|
||||
u64 perf_flags;
|
||||
|
||||
if (likely(!ctx->nr_counters))
|
||||
return 0;
|
||||
@ -969,7 +990,7 @@ int perf_counter_task_disable(void)
|
||||
/*
|
||||
* Disable all the counters:
|
||||
*/
|
||||
perf_flags = hw_perf_save_disable();
|
||||
perf_disable();
|
||||
|
||||
list_for_each_entry(counter, &ctx->counter_list, list_entry) {
|
||||
if (counter->state != PERF_COUNTER_STATE_ERROR) {
|
||||
@ -978,7 +999,7 @@ int perf_counter_task_disable(void)
|
||||
}
|
||||
}
|
||||
|
||||
hw_perf_restore(perf_flags);
|
||||
perf_enable();
|
||||
|
||||
spin_unlock_irqrestore(&ctx->lock, flags);
|
||||
|
||||
@ -991,7 +1012,6 @@ int perf_counter_task_enable(void)
|
||||
struct perf_counter_context *ctx = &curr->perf_counter_ctx;
|
||||
struct perf_counter *counter;
|
||||
unsigned long flags;
|
||||
u64 perf_flags;
|
||||
int cpu;
|
||||
|
||||
if (likely(!ctx->nr_counters))
|
||||
@ -1007,7 +1027,7 @@ int perf_counter_task_enable(void)
|
||||
/*
|
||||
* Disable all the counters:
|
||||
*/
|
||||
perf_flags = hw_perf_save_disable();
|
||||
perf_disable();
|
||||
|
||||
list_for_each_entry(counter, &ctx->counter_list, list_entry) {
|
||||
if (counter->state > PERF_COUNTER_STATE_OFF)
|
||||
@ -1017,7 +1037,7 @@ int perf_counter_task_enable(void)
|
||||
ctx->time - counter->total_time_enabled;
|
||||
counter->hw_event.disabled = 0;
|
||||
}
|
||||
hw_perf_restore(perf_flags);
|
||||
perf_enable();
|
||||
|
||||
spin_unlock(&ctx->lock);
|
||||
|
||||
@ -1034,7 +1054,6 @@ int perf_counter_task_enable(void)
|
||||
static void rotate_ctx(struct perf_counter_context *ctx)
|
||||
{
|
||||
struct perf_counter *counter;
|
||||
u64 perf_flags;
|
||||
|
||||
if (!ctx->nr_counters)
|
||||
return;
|
||||
@ -1043,12 +1062,12 @@ static void rotate_ctx(struct perf_counter_context *ctx)
|
||||
/*
|
||||
* Rotate the first entry last (works just fine for group counters too):
|
||||
*/
|
||||
perf_flags = hw_perf_save_disable();
|
||||
perf_disable();
|
||||
list_for_each_entry(counter, &ctx->counter_list, list_entry) {
|
||||
list_move_tail(&counter->list_entry, &ctx->counter_list);
|
||||
break;
|
||||
}
|
||||
hw_perf_restore(perf_flags);
|
||||
perf_enable();
|
||||
|
||||
spin_unlock(&ctx->lock);
|
||||
}
|
||||
@ -3194,7 +3213,6 @@ __perf_counter_exit_task(struct task_struct *child,
|
||||
} else {
|
||||
struct perf_cpu_context *cpuctx;
|
||||
unsigned long flags;
|
||||
u64 perf_flags;
|
||||
|
||||
/*
|
||||
* Disable and unlink this counter.
|
||||
@ -3203,7 +3221,7 @@ __perf_counter_exit_task(struct task_struct *child,
|
||||
* could still be processing it:
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
perf_flags = hw_perf_save_disable();
|
||||
perf_disable();
|
||||
|
||||
cpuctx = &__get_cpu_var(perf_cpu_context);
|
||||
|
||||
@ -3214,7 +3232,7 @@ __perf_counter_exit_task(struct task_struct *child,
|
||||
|
||||
child_ctx->nr_counters--;
|
||||
|
||||
hw_perf_restore(perf_flags);
|
||||
perf_enable();
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user