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clk: tegra: Fix xusb_fs_src mux
The parent-to-index mapping for xusb_fs_src is incorrect. Fix it by adding a mux table. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -329,7 +329,9 @@ static u32 mux_clkm_pllp_pllc_pllre_idx[] = {
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static const char *mux_clkm_48M_pllp_480M[] = {
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"clk_m", "pll_u_48M", "pll_p", "pll_u_480M"
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};
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#define mux_clkm_48M_pllp_480M_idx NULL
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static u32 mux_clkm_48M_pllp_480M_idx[] = {
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[0] = 0, [1] = 2, [2] = 4, [3] = 6,
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};
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static const char *mux_clkm_pllre_clk32_480M_pllc_ref[] = {
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"clk_m", "pll_re_out", "clk_32k", "pll_u_480M", "pll_c", "pll_ref"
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