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ASoC: mediatek: mt8192: Remove clock share parsing from DT

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Now that the clock sharing for i2s ports can be configured from the
sound machine driver, remove the logic that was used to parse the
properties from the devicetree.

Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220908161154.648557-4-nfraprado@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Nícolas F. R. A. Prado 2022-09-08 12:11:47 -04:00 committed by Mark Brown
parent 3ffb9fa396
commit 9ccd51ce39
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1 changed files with 0 additions and 35 deletions
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35
sound/soc/mediatek/mt8192/mt8192-dai-i2s.c
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@ -45,7 +45,6 @@ struct mtk_afe_i2s_priv {
int rate; /* for determine which apll to use */
int low_jitter_en;
const char *share_property_name;
int share_i2s_id;
int mclk_id;
@ -1984,79 +1983,50 @@ static const struct mtk_afe_i2s_priv mt8192_i2s_priv[DAI_I2S_NUM] = {
[DAI_I2S0] = {
.id = MT8192_DAI_I2S_0,
.mclk_id = MT8192_I2S0_MCK,
.share_property_name = "i2s0-share",
.share_i2s_id = -1,
},
[DAI_I2S1] = {
.id = MT8192_DAI_I2S_1,
.mclk_id = MT8192_I2S1_MCK,
.share_property_name = "i2s1-share",
.share_i2s_id = -1,
},
[DAI_I2S2] = {
.id = MT8192_DAI_I2S_2,
.mclk_id = MT8192_I2S2_MCK,
.share_property_name = "i2s2-share",
.share_i2s_id = -1,
},
[DAI_I2S3] = {
.id = MT8192_DAI_I2S_3,
.mclk_id = MT8192_I2S3_MCK,
.share_property_name = "i2s3-share",
.share_i2s_id = -1,
},
[DAI_I2S5] = {
.id = MT8192_DAI_I2S_5,
.mclk_id = MT8192_I2S5_MCK,
.share_property_name = "i2s5-share",
.share_i2s_id = -1,
},
[DAI_I2S6] = {
.id = MT8192_DAI_I2S_6,
.mclk_id = MT8192_I2S6_MCK,
.share_property_name = "i2s6-share",
.share_i2s_id = -1,
},
[DAI_I2S7] = {
.id = MT8192_DAI_I2S_7,
.mclk_id = MT8192_I2S7_MCK,
.share_property_name = "i2s7-share",
.share_i2s_id = -1,
},
[DAI_I2S8] = {
.id = MT8192_DAI_I2S_8,
.mclk_id = MT8192_I2S8_MCK,
.share_property_name = "i2s8-share",
.share_i2s_id = -1,
},
[DAI_I2S9] = {
.id = MT8192_DAI_I2S_9,
.mclk_id = MT8192_I2S9_MCK,
.share_property_name = "i2s9-share",
.share_i2s_id = -1,
},
};
static int mt8192_dai_i2s_get_share(struct mtk_base_afe *afe)
{
struct mt8192_afe_private *afe_priv = afe->platform_priv;
const struct device_node *of_node = afe->dev->of_node;
const char *of_str;
const char *property_name;
struct mtk_afe_i2s_priv *i2s_priv;
int i;
for (i = 0; i < DAI_I2S_NUM; i++) {
i2s_priv = afe_priv->dai_priv[mt8192_i2s_priv[i].id];
property_name = mt8192_i2s_priv[i].share_property_name;
if (of_property_read_string(of_node, property_name, &of_str))
continue;
i2s_priv->share_i2s_id = get_i2s_id_by_name(afe, of_str);
}
return 0;
}
/**
* mt8192_dai_i2s_set_share() - Set up I2S ports to share a single clock.
* @afe: Pointer to &struct mtk_base_afe
@ -2127,10 +2097,5 @@ int mt8192_dai_i2s_register(struct mtk_base_afe *afe)
if (ret)
return ret;
/* parse share i2s */
ret = mt8192_dai_i2s_get_share(afe);
if (ret)
return ret;
return 0;
}