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[SCSI] megaraid_sas: Add 9565/9285 specific code
This patch adds MegaRAID 9265/9285 (Device id 0x5b) specific code Signed-off-by: Adam Radford <aradford@gmail.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
This commit is contained in:
parent
cd50ba8ede
commit
9c915a8c99
@ -1,4 +1,5 @@
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obj-$(CONFIG_MEGARAID_MM) += megaraid_mm.o
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obj-$(CONFIG_MEGARAID_MAILBOX) += megaraid_mbox.o
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obj-$(CONFIG_MEGARAID_SAS) += megaraid_sas.o
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megaraid_sas-objs := megaraid_sas_base.o
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megaraid_sas-objs := megaraid_sas_base.o megaraid_sas_fusion.o \
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megaraid_sas_fp.o
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@ -33,9 +33,9 @@
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/*
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* MegaRAID SAS Driver meta data
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*/
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#define MEGASAS_VERSION "00.00.04.31-rc1"
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#define MEGASAS_RELDATE "May 3, 2010"
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#define MEGASAS_EXT_VERSION "Mon. May 3, 11:41:51 PST 2010"
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#define MEGASAS_VERSION "00.00.05.29-rc1"
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#define MEGASAS_RELDATE "Dec. 7, 2010"
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#define MEGASAS_EXT_VERSION "Tue. Dec. 7 17:00:00 PDT 2010"
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/*
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* Device IDs
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@ -47,6 +47,7 @@
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#define PCI_DEVICE_ID_LSI_SAS0079GEN2 0x0079
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#define PCI_DEVICE_ID_LSI_SAS0073SKINNY 0x0073
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#define PCI_DEVICE_ID_LSI_SAS0071SKINNY 0x0071
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#define PCI_DEVICE_ID_LSI_FUSION 0x005b
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/*
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* =====================================
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@ -436,7 +437,6 @@ struct megasas_ctrl_prop {
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* Add properties that can be controlled by
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* a bit in the following structure.
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*/
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struct {
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u32 copyBackDisabled : 1;
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u32 SMARTerEnabled : 1;
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@ -716,6 +716,7 @@ struct megasas_ctrl_info {
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#define MEGASAS_DEFAULT_INIT_ID -1
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#define MEGASAS_MAX_LUN 8
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#define MEGASAS_MAX_LD 64
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#define MEGASAS_DEFAULT_CMD_PER_LUN 128
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#define MEGASAS_MAX_PD (MEGASAS_MAX_PD_CHANNELS * \
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MEGASAS_MAX_DEV_PER_CHANNEL)
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#define MEGASAS_MAX_LD_IDS (MEGASAS_MAX_LD_CHANNELS * \
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@ -784,7 +785,10 @@ struct megasas_ctrl_info {
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*/
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struct megasas_register_set {
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u32 reserved_0[4]; /*0000h*/
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u32 doorbell; /*0000h*/
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u32 fusion_seq_offset; /*0004h*/
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u32 fusion_host_diag; /*0008h*/
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u32 reserved_01; /*000Ch*/
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u32 inbound_msg_0; /*0010h*/
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u32 inbound_msg_1; /*0014h*/
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@ -804,15 +808,18 @@ struct megasas_register_set {
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u32 inbound_queue_port; /*0040h*/
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u32 outbound_queue_port; /*0044h*/
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u32 reserved_2[22]; /*0048h*/
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u32 reserved_2[9]; /*0048h*/
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u32 reply_post_host_index; /*006Ch*/
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u32 reserved_2_2[12]; /*0070h*/
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u32 outbound_doorbell_clear; /*00A0h*/
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u32 reserved_3[3]; /*00A4h*/
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u32 outbound_scratch_pad ; /*00B0h*/
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u32 outbound_scratch_pad_2; /*00B4h*/
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u32 reserved_4[3]; /*00B4h*/
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u32 reserved_4[2]; /*00B8h*/
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u32 inbound_low_queue_port ; /*00C0h*/
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@ -1287,6 +1294,9 @@ struct megasas_instance {
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u16 max_num_sge;
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u16 max_fw_cmds;
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/* For Fusion its num IOCTL cmds, for others MFI based its
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max_fw_cmds */
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u16 max_mfi_cmds;
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u32 max_sectors_per_req;
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struct megasas_aen_event *ev;
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@ -1336,9 +1346,15 @@ struct megasas_instance {
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struct timer_list io_completion_timer;
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struct list_head internal_reset_pending_q;
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/* Ptr to hba specfic information */
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void *ctrl_context;
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u8 msi_flag;
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struct msix_entry msixentry;
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u64 map_id;
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struct megasas_cmd *map_update_cmd;
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unsigned long bar;
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long reset_flags;
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struct mutex reset_mutex;
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};
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enum {
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@ -1397,7 +1413,13 @@ struct megasas_cmd {
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struct list_head list;
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struct scsi_cmnd *scmd;
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struct megasas_instance *instance;
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u32 frame_count;
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union {
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struct {
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u16 smid;
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u16 resvd;
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} context;
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u32 frame_count;
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};
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};
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#define MAX_MGMT_ADAPTERS 1024
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@ -53,6 +53,7 @@
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_host.h>
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#include "megaraid_sas_fusion.h"
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#include "megaraid_sas.h"
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/*
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@ -81,7 +82,7 @@ MODULE_VERSION(MEGASAS_VERSION);
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MODULE_AUTHOR("megaraidlinux@lsi.com");
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MODULE_DESCRIPTION("LSI MegaRAID SAS Driver");
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static int megasas_transition_to_ready(struct megasas_instance *instance);
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int megasas_transition_to_ready(struct megasas_instance *instance);
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static int megasas_get_pd_list(struct megasas_instance *instance);
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static int megasas_issue_init_mfi(struct megasas_instance *instance);
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static int megasas_register_aen(struct megasas_instance *instance,
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@ -109,6 +110,8 @@ static struct pci_device_id megasas_pci_table[] = {
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/* xscale IOP, vega */
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{PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
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/* xscale IOP */
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{PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
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/* Fusion */
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{}
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};
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@ -122,15 +125,16 @@ static DEFINE_MUTEX(megasas_async_queue_mutex);
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static int megasas_poll_wait_aen;
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static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
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static u32 support_poll_for_event;
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static u32 megasas_dbg_lvl;
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u32 megasas_dbg_lvl;
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static u32 support_device_change;
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/* define lock for aen poll */
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spinlock_t poll_aen_lock;
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static void
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void
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megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
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u8 alt_status);
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static irqreturn_t megasas_isr(int irq, void *devp);
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static u32
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megasas_init_adapter_mfi(struct megasas_instance *instance);
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@ -138,6 +142,23 @@ u32
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megasas_build_and_issue_cmd(struct megasas_instance *instance,
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struct scsi_cmnd *scmd);
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static void megasas_complete_cmd_dpc(unsigned long instance_addr);
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void
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megasas_release_fusion(struct megasas_instance *instance);
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int
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megasas_ioc_init_fusion(struct megasas_instance *instance);
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void
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megasas_free_cmds_fusion(struct megasas_instance *instance);
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u8
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megasas_get_map_info(struct megasas_instance *instance);
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int
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megasas_sync_map_info(struct megasas_instance *instance);
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int
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wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd);
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void megasas_reset_reply_desc(struct megasas_instance *instance);
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u8 MR_ValidateMapInfo(struct MR_FW_RAID_MAP_ALL *map,
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struct LD_LOAD_BALANCE_INFO *lbInfo);
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int megasas_reset_fusion(struct Scsi_Host *shost);
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void megasas_fusion_ocr_wq(struct work_struct *work);
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void
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megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
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@ -152,7 +173,7 @@ megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
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*
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* Returns a free command from the pool
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*/
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static struct megasas_cmd *megasas_get_cmd(struct megasas_instance
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struct megasas_cmd *megasas_get_cmd(struct megasas_instance
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*instance)
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{
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unsigned long flags;
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@ -177,7 +198,7 @@ static struct megasas_cmd *megasas_get_cmd(struct megasas_instance
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* @instance: Adapter soft state
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* @cmd: Command packet to be returned to free command pool
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*/
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static inline void
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inline void
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megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
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{
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unsigned long flags;
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@ -185,6 +206,7 @@ megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
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spin_lock_irqsave(&instance->cmd_pool_lock, flags);
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cmd->scmd = NULL;
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cmd->frame_count = 0;
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list_add_tail(&cmd->list, &instance->cmd_pool);
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spin_unlock_irqrestore(&instance->cmd_pool_lock, flags);
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@ -796,6 +818,11 @@ static struct megasas_instance_template megasas_instance_template_gen2 = {
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* specific to gen2 (deviceid : 0x78, 0x79) controllers
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*/
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/*
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* Template added for TB (Fusion)
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*/
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extern struct megasas_instance_template megasas_instance_template_fusion;
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/**
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* megasas_issue_polled - Issues a polling command
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* @instance: Adapter soft state
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@ -803,11 +830,9 @@ static struct megasas_instance_template megasas_instance_template_gen2 = {
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*
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* For polling, MFI requires the cmd_status to be set to 0xFF before posting.
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*/
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static int
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int
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megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
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{
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int i;
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u32 msecs = MFI_POLL_TIMEOUT_SECS * 1000;
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struct megasas_header *frame_hdr = &cmd->frame->hdr;
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@ -817,21 +842,12 @@ megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
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/*
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* Issue the frame using inbound queue port
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*/
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instance->instancet->fire_cmd(instance,
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cmd->frame_phys_addr, 0, instance->reg_set);
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instance->instancet->issue_dcmd(instance, cmd);
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/*
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* Wait for cmd_status to change
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*/
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for (i = 0; (i < msecs) && (frame_hdr->cmd_status == 0xff); i++) {
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rmb();
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msleep(1);
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}
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if (frame_hdr->cmd_status == 0xff)
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return -ETIME;
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return 0;
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return wait_and_poll(instance, cmd);
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}
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/**
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@ -849,8 +865,7 @@ megasas_issue_blocked_cmd(struct megasas_instance *instance,
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{
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cmd->cmd_status = ENODATA;
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instance->instancet->fire_cmd(instance,
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cmd->frame_phys_addr, 0, instance->reg_set);
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instance->instancet->issue_dcmd(instance, cmd);
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wait_event(instance->int_cmd_wait_q, cmd->cmd_status != ENODATA);
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@ -894,8 +909,7 @@ megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
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cmd->sync_cmd = 1;
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cmd->cmd_status = 0xFF;
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instance->instancet->fire_cmd(instance,
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cmd->frame_phys_addr, 0, instance->reg_set);
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instance->instancet->issue_dcmd(instance, cmd);
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/*
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* Wait for this cmd to complete
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@ -1291,7 +1305,7 @@ megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
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* Called by megasas_queue_command to find out if the command to be queued
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* is a logical drive command
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*/
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static inline int megasas_is_ldio(struct scsi_cmnd *cmd)
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inline int megasas_is_ldio(struct scsi_cmnd *cmd)
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{
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if (!MEGASAS_IS_LOGICAL(cmd))
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return 0;
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@ -1551,15 +1565,44 @@ static int megasas_slave_alloc(struct scsi_device *sdev)
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return 0;
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}
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static void megaraid_sas_kill_hba(struct megasas_instance *instance)
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void megaraid_sas_kill_hba(struct megasas_instance *instance)
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{
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if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
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(instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
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writel(MFI_STOP_ADP,
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&instance->reg_set->reserved_0[0]);
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(instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
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(instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION)) {
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writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
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} else {
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writel(MFI_STOP_ADP,
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&instance->reg_set->inbound_doorbell);
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writel(MFI_STOP_ADP, &instance->reg_set->inbound_doorbell);
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}
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}
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/**
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* megasas_check_and_restore_queue_depth - Check if queue depth needs to be
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* restored to max value
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* @instance: Adapter soft state
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*
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*/
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void
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megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
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{
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unsigned long flags;
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if (instance->flag & MEGASAS_FW_BUSY
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&& time_after(jiffies, instance->last_time + 5 * HZ)
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&& atomic_read(&instance->fw_outstanding) < 17) {
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spin_lock_irqsave(instance->host->host_lock, flags);
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instance->flag &= ~MEGASAS_FW_BUSY;
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if ((instance->pdev->device ==
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PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
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(instance->pdev->device ==
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PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
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instance->host->can_queue =
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instance->max_fw_cmds - MEGASAS_SKINNY_INT_CMDS;
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} else
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instance->host->can_queue =
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instance->max_fw_cmds - MEGASAS_INT_CMDS;
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spin_unlock_irqrestore(instance->host->host_lock, flags);
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}
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}
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@ -1613,24 +1656,7 @@ static void megasas_complete_cmd_dpc(unsigned long instance_addr)
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/*
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* Check if we can restore can_queue
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*/
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if (instance->flag & MEGASAS_FW_BUSY
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&& time_after(jiffies, instance->last_time + 5 * HZ)
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&& atomic_read(&instance->fw_outstanding) < 17) {
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spin_lock_irqsave(instance->host->host_lock, flags);
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instance->flag &= ~MEGASAS_FW_BUSY;
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if ((instance->pdev->device ==
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PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
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(instance->pdev->device ==
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PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
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instance->host->can_queue =
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instance->max_fw_cmds - MEGASAS_SKINNY_INT_CMDS;
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} else
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instance->host->can_queue =
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instance->max_fw_cmds - MEGASAS_INT_CMDS;
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spin_unlock_irqrestore(instance->host->host_lock, flags);
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}
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megasas_check_and_restore_queue_depth(instance);
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}
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static void
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@ -1808,7 +1834,7 @@ static int megasas_wait_for_outstanding(struct megasas_instance *instance)
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(instance->pdev->device ==
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PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
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writel(MFI_STOP_ADP,
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&instance->reg_set->reserved_0[0]);
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&instance->reg_set->doorbell);
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} else {
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writel(MFI_STOP_ADP,
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&instance->reg_set->inbound_doorbell);
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@ -1912,11 +1938,16 @@ static int megasas_reset_device(struct scsi_cmnd *scmd)
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static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
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{
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int ret;
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struct megasas_instance *instance;
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instance = (struct megasas_instance *)scmd->device->host->hostdata;
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/*
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* First wait for all commands to complete
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*/
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ret = megasas_generic_reset(scmd);
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if (instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION)
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ret = megasas_reset_fusion(scmd->device->host);
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else
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ret = megasas_generic_reset(scmd);
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return ret;
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}
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@ -2086,13 +2117,14 @@ megasas_complete_abort(struct megasas_instance *instance,
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* an alternate status (as in the case of aborted
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* commands)
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*/
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static void
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void
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megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
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u8 alt_status)
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{
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int exception = 0;
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struct megasas_header *hdr = &cmd->frame->hdr;
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unsigned long flags;
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struct fusion_context *fusion = instance->ctrl_context;
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/* flag for the retry reset */
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cmd->retry_for_fw_reset = 0;
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@ -2185,6 +2217,37 @@ megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
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case MFI_CMD_SMP:
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case MFI_CMD_STP:
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case MFI_CMD_DCMD:
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/* Check for LD map update */
|
||||
if ((cmd->frame->dcmd.opcode == MR_DCMD_LD_MAP_GET_INFO) &&
|
||||
(cmd->frame->dcmd.mbox.b[1] == 1)) {
|
||||
spin_lock_irqsave(instance->host->host_lock, flags);
|
||||
if (cmd->frame->hdr.cmd_status != 0) {
|
||||
if (cmd->frame->hdr.cmd_status !=
|
||||
MFI_STAT_NOT_FOUND)
|
||||
printk(KERN_WARNING "megasas: map sync"
|
||||
"failed, status = 0x%x.\n",
|
||||
cmd->frame->hdr.cmd_status);
|
||||
else {
|
||||
megasas_return_cmd(instance, cmd);
|
||||
spin_unlock_irqrestore(
|
||||
instance->host->host_lock,
|
||||
flags);
|
||||
break;
|
||||
}
|
||||
} else
|
||||
instance->map_id++;
|
||||
megasas_return_cmd(instance, cmd);
|
||||
if (MR_ValidateMapInfo(
|
||||
fusion->ld_map[(instance->map_id & 1)],
|
||||
fusion->load_balance_info))
|
||||
fusion->fast_path_io = 1;
|
||||
else
|
||||
fusion->fast_path_io = 0;
|
||||
megasas_sync_map_info(instance);
|
||||
spin_unlock_irqrestore(instance->host->host_lock,
|
||||
flags);
|
||||
break;
|
||||
}
|
||||
if (cmd->frame->dcmd.opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
|
||||
cmd->frame->dcmd.opcode == MR_DCMD_CTRL_EVENT_GET) {
|
||||
spin_lock_irqsave(&poll_aen_lock, flags);
|
||||
@ -2523,7 +2586,7 @@ static irqreturn_t megasas_isr(int irq, void *devp)
|
||||
* states, driver must take steps to bring it to ready state. Otherwise, it
|
||||
* has to wait for the ready state.
|
||||
*/
|
||||
static int
|
||||
int
|
||||
megasas_transition_to_ready(struct megasas_instance* instance)
|
||||
{
|
||||
int i;
|
||||
@ -2557,11 +2620,12 @@ megasas_transition_to_ready(struct megasas_instance* instance)
|
||||
if ((instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
|
||||
(instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
|
||||
|
||||
PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
|
||||
(instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_FUSION)) {
|
||||
writel(
|
||||
MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
|
||||
&instance->reg_set->reserved_0[0]);
|
||||
&instance->reg_set->doorbell);
|
||||
} else {
|
||||
writel(
|
||||
MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
|
||||
@ -2574,11 +2638,13 @@ megasas_transition_to_ready(struct megasas_instance* instance)
|
||||
|
||||
case MFI_STATE_BOOT_MESSAGE_PENDING:
|
||||
if ((instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
|
||||
(instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
|
||||
PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
|
||||
(instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
|
||||
(instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_FUSION)) {
|
||||
writel(MFI_INIT_HOTPLUG,
|
||||
&instance->reg_set->reserved_0[0]);
|
||||
&instance->reg_set->doorbell);
|
||||
} else
|
||||
writel(MFI_INIT_HOTPLUG,
|
||||
&instance->reg_set->inbound_doorbell);
|
||||
@ -2595,9 +2661,23 @@ megasas_transition_to_ready(struct megasas_instance* instance)
|
||||
if ((instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
|
||||
(instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
|
||||
PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
|
||||
(instance->pdev->device
|
||||
== PCI_DEVICE_ID_LSI_FUSION)) {
|
||||
writel(MFI_RESET_FLAGS,
|
||||
&instance->reg_set->reserved_0[0]);
|
||||
&instance->reg_set->doorbell);
|
||||
if (instance->pdev->device ==
|
||||
PCI_DEVICE_ID_LSI_FUSION) {
|
||||
for (i = 0; i < (10 * 1000); i += 20) {
|
||||
if (readl(
|
||||
&instance->
|
||||
reg_set->
|
||||
doorbell) & 1)
|
||||
msleep(20);
|
||||
else
|
||||
break;
|
||||
}
|
||||
}
|
||||
} else
|
||||
writel(MFI_RESET_FLAGS,
|
||||
&instance->reg_set->inbound_doorbell);
|
||||
@ -2681,7 +2761,7 @@ megasas_transition_to_ready(struct megasas_instance* instance)
|
||||
static void megasas_teardown_frame_pool(struct megasas_instance *instance)
|
||||
{
|
||||
int i;
|
||||
u32 max_cmd = instance->max_fw_cmds;
|
||||
u32 max_cmd = instance->max_mfi_cmds;
|
||||
struct megasas_cmd *cmd;
|
||||
|
||||
if (!instance->frame_dma_pool)
|
||||
@ -2732,7 +2812,7 @@ static int megasas_create_frame_pool(struct megasas_instance *instance)
|
||||
u32 frame_count;
|
||||
struct megasas_cmd *cmd;
|
||||
|
||||
max_cmd = instance->max_fw_cmds;
|
||||
max_cmd = instance->max_mfi_cmds;
|
||||
|
||||
/*
|
||||
* Size of our frame is 64 bytes for MFI frame, followed by max SG
|
||||
@ -2819,14 +2899,15 @@ static int megasas_create_frame_pool(struct megasas_instance *instance)
|
||||
* megasas_free_cmds - Free all the cmds in the free cmd pool
|
||||
* @instance: Adapter soft state
|
||||
*/
|
||||
static void megasas_free_cmds(struct megasas_instance *instance)
|
||||
void megasas_free_cmds(struct megasas_instance *instance)
|
||||
{
|
||||
int i;
|
||||
/* First free the MFI frame pool */
|
||||
megasas_teardown_frame_pool(instance);
|
||||
|
||||
/* Free all the commands in the cmd_list */
|
||||
for (i = 0; i < instance->max_fw_cmds; i++)
|
||||
for (i = 0; i < instance->max_mfi_cmds; i++)
|
||||
|
||||
kfree(instance->cmd_list[i]);
|
||||
|
||||
/* Free the cmd_list buffer itself */
|
||||
@ -2854,14 +2935,14 @@ static void megasas_free_cmds(struct megasas_instance *instance)
|
||||
* This array is used only to look up the megasas_cmd given the context. The
|
||||
* free commands themselves are maintained in a linked list called cmd_pool.
|
||||
*/
|
||||
static int megasas_alloc_cmds(struct megasas_instance *instance)
|
||||
int megasas_alloc_cmds(struct megasas_instance *instance)
|
||||
{
|
||||
int i;
|
||||
int j;
|
||||
u32 max_cmd;
|
||||
struct megasas_cmd *cmd;
|
||||
|
||||
max_cmd = instance->max_fw_cmds;
|
||||
max_cmd = instance->max_mfi_cmds;
|
||||
|
||||
/*
|
||||
* instance->cmd_list is an array of struct megasas_cmd pointers.
|
||||
@ -2875,6 +2956,7 @@ static int megasas_alloc_cmds(struct megasas_instance *instance)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
|
||||
|
||||
for (i = 0; i < max_cmd; i++) {
|
||||
instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
|
||||
@ -3288,6 +3370,7 @@ megasas_init_adapter_mfi(struct megasas_instance *instance)
|
||||
* does not exceed max cmds that the FW can support
|
||||
*/
|
||||
instance->max_fw_cmds = instance->max_fw_cmds-1;
|
||||
instance->max_mfi_cmds = instance->max_fw_cmds;
|
||||
instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
|
||||
0x10;
|
||||
/*
|
||||
@ -3381,6 +3464,9 @@ static int megasas_init_fw(struct megasas_instance *instance)
|
||||
reg_set = instance->reg_set;
|
||||
|
||||
switch (instance->pdev->device) {
|
||||
case PCI_DEVICE_ID_LSI_FUSION:
|
||||
instance->instancet = &megasas_instance_template_fusion;
|
||||
break;
|
||||
case PCI_DEVICE_ID_LSI_SAS1078R:
|
||||
case PCI_DEVICE_ID_LSI_SAS1078DE:
|
||||
instance->instancet = &megasas_instance_template_ppc;
|
||||
@ -3482,9 +3568,10 @@ fail_ready_state:
|
||||
*/
|
||||
static void megasas_release_mfi(struct megasas_instance *instance)
|
||||
{
|
||||
u32 reply_q_sz = sizeof(u32) * (instance->max_fw_cmds + 1);
|
||||
u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
|
||||
|
||||
pci_free_consistent(instance->pdev, reply_q_sz,
|
||||
if (instance->reply_queue)
|
||||
pci_free_consistent(instance->pdev, reply_q_sz,
|
||||
instance->reply_queue, instance->reply_queue_h);
|
||||
|
||||
megasas_free_cmds(instance);
|
||||
@ -3678,8 +3765,7 @@ megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
|
||||
/*
|
||||
* Issue the aen registration frame
|
||||
*/
|
||||
instance->instancet->fire_cmd(instance,
|
||||
cmd->frame_phys_addr, 0, instance->reg_set);
|
||||
instance->instancet->issue_dcmd(instance, cmd);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -3756,12 +3842,18 @@ static int megasas_io_attach(struct megasas_instance *instance)
|
||||
}
|
||||
|
||||
host->max_sectors = instance->max_sectors_per_req;
|
||||
host->cmd_per_lun = 128;
|
||||
host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
|
||||
host->max_channel = MEGASAS_MAX_CHANNELS - 1;
|
||||
host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
|
||||
host->max_lun = MEGASAS_MAX_LUN;
|
||||
host->max_cmd_len = 16;
|
||||
|
||||
/* Fusion only supports host reset */
|
||||
if (instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) {
|
||||
host->hostt->eh_device_reset_handler = NULL;
|
||||
host->hostt->eh_bus_reset_handler = NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Notify the mid-layer about the new controller
|
||||
*/
|
||||
@ -3846,20 +3938,45 @@ megasas_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
instance = (struct megasas_instance *)host->hostdata;
|
||||
memset(instance, 0, sizeof(*instance));
|
||||
atomic_set( &instance->fw_reset_no_pci_access, 0 );
|
||||
instance->pdev = pdev;
|
||||
|
||||
instance->producer = pci_alloc_consistent(pdev, sizeof(u32),
|
||||
&instance->producer_h);
|
||||
instance->consumer = pci_alloc_consistent(pdev, sizeof(u32),
|
||||
&instance->consumer_h);
|
||||
switch (instance->pdev->device) {
|
||||
case PCI_DEVICE_ID_LSI_FUSION:
|
||||
{
|
||||
struct fusion_context *fusion;
|
||||
|
||||
if (!instance->producer || !instance->consumer) {
|
||||
printk(KERN_DEBUG "megasas: Failed to allocate memory for "
|
||||
"producer, consumer\n");
|
||||
goto fail_alloc_dma_buf;
|
||||
instance->ctrl_context =
|
||||
kzalloc(sizeof(struct fusion_context), GFP_KERNEL);
|
||||
if (!instance->ctrl_context) {
|
||||
printk(KERN_DEBUG "megasas: Failed to allocate "
|
||||
"memory for Fusion context info\n");
|
||||
goto fail_alloc_dma_buf;
|
||||
}
|
||||
fusion = instance->ctrl_context;
|
||||
INIT_LIST_HEAD(&fusion->cmd_pool);
|
||||
spin_lock_init(&fusion->cmd_pool_lock);
|
||||
}
|
||||
break;
|
||||
default: /* For all other supported controllers */
|
||||
|
||||
instance->producer =
|
||||
pci_alloc_consistent(pdev, sizeof(u32),
|
||||
&instance->producer_h);
|
||||
instance->consumer =
|
||||
pci_alloc_consistent(pdev, sizeof(u32),
|
||||
&instance->consumer_h);
|
||||
|
||||
if (!instance->producer || !instance->consumer) {
|
||||
printk(KERN_DEBUG "megasas: Failed to allocate"
|
||||
"memory for producer, consumer\n");
|
||||
goto fail_alloc_dma_buf;
|
||||
}
|
||||
|
||||
*instance->producer = 0;
|
||||
*instance->consumer = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
*instance->producer = 0;
|
||||
*instance->consumer = 0;
|
||||
megasas_poll_wait_aen = 0;
|
||||
instance->flag_ieee = 0;
|
||||
instance->ev = NULL;
|
||||
@ -3895,11 +4012,11 @@ megasas_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
spin_lock_init(&poll_aen_lock);
|
||||
|
||||
mutex_init(&instance->aen_mutex);
|
||||
mutex_init(&instance->reset_mutex);
|
||||
|
||||
/*
|
||||
* Initialize PCI related and misc parameters
|
||||
*/
|
||||
instance->pdev = pdev;
|
||||
instance->host = host;
|
||||
instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
|
||||
instance->init_id = MEGASAS_DEFAULT_INIT_ID;
|
||||
@ -3917,7 +4034,10 @@ megasas_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
instance->last_time = 0;
|
||||
instance->disableOnlineCtrlReset = 1;
|
||||
|
||||
INIT_WORK(&instance->work_init, process_fw_state_change_wq);
|
||||
if (instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION)
|
||||
INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
|
||||
else
|
||||
INIT_WORK(&instance->work_init, process_fw_state_change_wq);
|
||||
|
||||
/*
|
||||
* Initialize MFI Firmware
|
||||
@ -4000,6 +4120,8 @@ megasas_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
pci_free_consistent(pdev, sizeof(u32), instance->producer,
|
||||
instance->producer_h);
|
||||
megasas_release_mfi(instance);
|
||||
} else {
|
||||
megasas_release_fusion(instance);
|
||||
}
|
||||
if (instance->consumer)
|
||||
pci_free_consistent(pdev, sizeof(u32), instance->consumer,
|
||||
@ -4072,7 +4194,9 @@ static void megasas_shutdown_controller(struct megasas_instance *instance,
|
||||
|
||||
if (instance->aen_cmd)
|
||||
megasas_issue_blocked_abort_cmd(instance, instance->aen_cmd);
|
||||
|
||||
if (instance->map_update_cmd)
|
||||
megasas_issue_blocked_abort_cmd(instance,
|
||||
instance->map_update_cmd);
|
||||
dcmd = &cmd->frame->dcmd;
|
||||
|
||||
memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
|
||||
@ -4177,9 +4301,6 @@ megasas_resume(struct pci_dev *pdev)
|
||||
* Initialize MFI Firmware
|
||||
*/
|
||||
|
||||
*instance->producer = 0;
|
||||
*instance->consumer = 0;
|
||||
|
||||
atomic_set(&instance->fw_outstanding, 0);
|
||||
|
||||
/*
|
||||
@ -4188,11 +4309,29 @@ megasas_resume(struct pci_dev *pdev)
|
||||
if (megasas_transition_to_ready(instance))
|
||||
goto fail_ready_state;
|
||||
|
||||
if (megasas_issue_init_mfi(instance))
|
||||
goto fail_init_mfi;
|
||||
switch (instance->pdev->device) {
|
||||
case PCI_DEVICE_ID_LSI_FUSION:
|
||||
{
|
||||
megasas_reset_reply_desc(instance);
|
||||
if (megasas_ioc_init_fusion(instance)) {
|
||||
megasas_free_cmds(instance);
|
||||
megasas_free_cmds_fusion(instance);
|
||||
goto fail_init_mfi;
|
||||
}
|
||||
if (!megasas_get_map_info(instance))
|
||||
megasas_sync_map_info(instance);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
*instance->producer = 0;
|
||||
*instance->consumer = 0;
|
||||
if (megasas_issue_init_mfi(instance))
|
||||
goto fail_init_mfi;
|
||||
break;
|
||||
}
|
||||
|
||||
tasklet_init(&instance->isr_tasklet, megasas_complete_cmd_dpc,
|
||||
(unsigned long)instance);
|
||||
tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
|
||||
(unsigned long)instance);
|
||||
|
||||
/* Now re-enable MSI-X */
|
||||
if (instance->msi_flag)
|
||||
@ -4261,10 +4400,12 @@ static void __devexit megasas_detach_one(struct pci_dev *pdev)
|
||||
int i;
|
||||
struct Scsi_Host *host;
|
||||
struct megasas_instance *instance;
|
||||
struct fusion_context *fusion;
|
||||
|
||||
instance = pci_get_drvdata(pdev);
|
||||
instance->unload = 1;
|
||||
host = instance->host;
|
||||
fusion = instance->ctrl_context;
|
||||
|
||||
if (poll_mode_io)
|
||||
del_timer_sync(&instance->io_completion_timer);
|
||||
@ -4306,16 +4447,32 @@ static void __devexit megasas_detach_one(struct pci_dev *pdev)
|
||||
if (instance->msi_flag)
|
||||
pci_disable_msix(instance->pdev);
|
||||
|
||||
megasas_release_mfi(instance);
|
||||
|
||||
pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
|
||||
instance->evt_detail, instance->evt_detail_h);
|
||||
|
||||
pci_free_consistent(pdev, sizeof(u32), instance->producer,
|
||||
instance->producer_h);
|
||||
|
||||
pci_free_consistent(pdev, sizeof(u32), instance->consumer,
|
||||
instance->consumer_h);
|
||||
switch (instance->pdev->device) {
|
||||
case PCI_DEVICE_ID_LSI_FUSION:
|
||||
megasas_release_fusion(instance);
|
||||
for (i = 0; i < 2 ; i++)
|
||||
if (fusion->ld_map[i])
|
||||
dma_free_coherent(&instance->pdev->dev,
|
||||
fusion->map_sz,
|
||||
fusion->ld_map[i],
|
||||
fusion->
|
||||
ld_map_phys[i]);
|
||||
kfree(instance->ctrl_context);
|
||||
break;
|
||||
default:
|
||||
megasas_release_mfi(instance);
|
||||
pci_free_consistent(pdev,
|
||||
sizeof(struct megasas_evt_detail),
|
||||
instance->evt_detail,
|
||||
instance->evt_detail_h);
|
||||
pci_free_consistent(pdev, sizeof(u32),
|
||||
instance->producer,
|
||||
instance->producer_h);
|
||||
pci_free_consistent(pdev, sizeof(u32),
|
||||
instance->consumer,
|
||||
instance->consumer_h);
|
||||
break;
|
||||
}
|
||||
|
||||
scsi_host_put(host);
|
||||
|
||||
@ -5079,6 +5236,7 @@ megasas_aen_polling(struct work_struct *work)
|
||||
break;
|
||||
case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
|
||||
case MR_EVT_FOREIGN_CFG_IMPORTED:
|
||||
case MR_EVT_LD_STATE_CHANGE:
|
||||
doscan = 1;
|
||||
break;
|
||||
default:
|
||||
|
516
drivers/scsi/megaraid/megaraid_sas_fp.c
Normal file
516
drivers/scsi/megaraid/megaraid_sas_fp.c
Normal file
@ -0,0 +1,516 @@
|
||||
/*
|
||||
* Linux MegaRAID driver for SAS based RAID controllers
|
||||
*
|
||||
* Copyright (c) 2009-2011 LSI Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* FILE: megaraid_sas_fp.c
|
||||
*
|
||||
* Authors: LSI Corporation
|
||||
* Sumant Patro
|
||||
* Varad Talamacki
|
||||
* Manoj Jose
|
||||
*
|
||||
* Send feedback to: <megaraidlinux@lsi.com>
|
||||
*
|
||||
* Mail to: LSI Corporation, 1621 Barber Lane, Milpitas, CA 95035
|
||||
* ATTN: Linuxraid
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/moduleparam.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/smp_lock.h>
|
||||
#include <linux/uio.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/compat.h>
|
||||
#include <linux/blkdev.h>
|
||||
#include <linux/poll.h>
|
||||
|
||||
#include <scsi/scsi.h>
|
||||
#include <scsi/scsi_cmnd.h>
|
||||
#include <scsi/scsi_device.h>
|
||||
#include <scsi/scsi_host.h>
|
||||
|
||||
#include "megaraid_sas_fusion.h"
|
||||
#include <asm/div64.h>
|
||||
|
||||
#define ABS_DIFF(a, b) (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
|
||||
#define MR_LD_STATE_OPTIMAL 3
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
|
||||
/* Prototypes */
|
||||
void
|
||||
mr_update_load_balance_params(struct MR_FW_RAID_MAP_ALL *map,
|
||||
struct LD_LOAD_BALANCE_INFO *lbInfo);
|
||||
|
||||
u32 mega_mod64(u64 dividend, u32 divisor)
|
||||
{
|
||||
u64 d;
|
||||
u32 remainder;
|
||||
|
||||
if (!divisor)
|
||||
printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
|
||||
d = dividend;
|
||||
remainder = do_div(d, divisor);
|
||||
return remainder;
|
||||
}
|
||||
|
||||
/**
|
||||
* @param dividend : Dividend
|
||||
* @param divisor : Divisor
|
||||
*
|
||||
* @return quotient
|
||||
**/
|
||||
u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
|
||||
{
|
||||
u32 remainder;
|
||||
u64 d;
|
||||
|
||||
if (!divisor)
|
||||
printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");
|
||||
|
||||
d = dividend;
|
||||
remainder = do_div(d, divisor);
|
||||
|
||||
return d;
|
||||
}
|
||||
|
||||
struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
return &map->raidMap.ldSpanMap[ld].ldRaid;
|
||||
}
|
||||
|
||||
static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
|
||||
struct MR_FW_RAID_MAP_ALL
|
||||
*map)
|
||||
{
|
||||
return &map->raidMap.ldSpanMap[ld].spanBlock[0];
|
||||
}
|
||||
|
||||
static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
|
||||
}
|
||||
|
||||
static u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
return map->raidMap.arMapInfo[ar].pd[arm];
|
||||
}
|
||||
|
||||
static u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
return map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef;
|
||||
}
|
||||
|
||||
static u16 MR_PdDevHandleGet(u32 pd, struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
return map->raidMap.devHndlInfo[pd].curDevHdl;
|
||||
}
|
||||
|
||||
u16 MR_GetLDTgtId(u32 ld, struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
return map->raidMap.ldSpanMap[ld].ldRaid.targetId;
|
||||
}
|
||||
|
||||
u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
return map->raidMap.ldTgtIdToLd[ldTgtId];
|
||||
}
|
||||
|
||||
static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
|
||||
struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function will validate Map info data provided by FW
|
||||
*/
|
||||
u8 MR_ValidateMapInfo(struct MR_FW_RAID_MAP_ALL *map,
|
||||
struct LD_LOAD_BALANCE_INFO *lbInfo)
|
||||
{
|
||||
struct MR_FW_RAID_MAP *pFwRaidMap = &map->raidMap;
|
||||
|
||||
if (pFwRaidMap->totalSize !=
|
||||
(sizeof(struct MR_FW_RAID_MAP) -sizeof(struct MR_LD_SPAN_MAP) +
|
||||
(sizeof(struct MR_LD_SPAN_MAP) *pFwRaidMap->ldCount))) {
|
||||
printk(KERN_ERR "megasas: map info structure size 0x%x is not matching with ld count\n",
|
||||
(unsigned int)((sizeof(struct MR_FW_RAID_MAP) -
|
||||
sizeof(struct MR_LD_SPAN_MAP)) +
|
||||
(sizeof(struct MR_LD_SPAN_MAP) *
|
||||
pFwRaidMap->ldCount)));
|
||||
printk(KERN_ERR "megasas: span map %x, pFwRaidMap->totalSize "
|
||||
": %x\n", (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
|
||||
pFwRaidMap->totalSize);
|
||||
return 0;
|
||||
}
|
||||
|
||||
mr_update_load_balance_params(map, lbInfo);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
|
||||
struct MR_FW_RAID_MAP_ALL *map, int *div_error)
|
||||
{
|
||||
struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
|
||||
struct MR_QUAD_ELEMENT *quad;
|
||||
struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
|
||||
u32 span, j;
|
||||
|
||||
for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {
|
||||
|
||||
for (j = 0; j < pSpanBlock->block_span_info.noElements; j++) {
|
||||
quad = &pSpanBlock->block_span_info.quad[j];
|
||||
|
||||
if (quad->diff == 0) {
|
||||
*div_error = 1;
|
||||
return span;
|
||||
}
|
||||
if (quad->logStart <= row && row <= quad->logEnd &&
|
||||
(mega_mod64(row-quad->logStart, quad->diff)) == 0) {
|
||||
if (span_blk != NULL) {
|
||||
u64 blk, debugBlk;
|
||||
blk =
|
||||
mega_div64_32(
|
||||
(row-quad->logStart),
|
||||
quad->diff);
|
||||
debugBlk = blk;
|
||||
|
||||
blk = (blk + quad->offsetInSpan) <<
|
||||
raid->stripeShift;
|
||||
*span_blk = blk;
|
||||
}
|
||||
return span;
|
||||
}
|
||||
}
|
||||
}
|
||||
return span;
|
||||
}
|
||||
|
||||
/*
|
||||
******************************************************************************
|
||||
*
|
||||
* This routine calculates the arm, span and block for the specified stripe and
|
||||
* reference in stripe.
|
||||
*
|
||||
* Inputs :
|
||||
*
|
||||
* ld - Logical drive number
|
||||
* stripRow - Stripe number
|
||||
* stripRef - Reference in stripe
|
||||
*
|
||||
* Outputs :
|
||||
*
|
||||
* span - Span number
|
||||
* block - Absolute Block number in the physical disk
|
||||
*/
|
||||
u8 MR_GetPhyParams(u32 ld, u64 stripRow, u16 stripRef, u64 *pdBlock,
|
||||
u16 *pDevHandle, struct RAID_CONTEXT *pRAID_Context,
|
||||
struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
|
||||
u32 pd, arRef;
|
||||
u8 physArm, span;
|
||||
u64 row;
|
||||
u8 retval = TRUE;
|
||||
int error_code = 0;
|
||||
|
||||
row = mega_div64_32(stripRow, raid->rowDataSize);
|
||||
|
||||
if (raid->level == 6) {
|
||||
/* logical arm within row */
|
||||
u32 logArm = mega_mod64(stripRow, raid->rowDataSize);
|
||||
u32 rowMod, armQ, arm;
|
||||
|
||||
if (raid->rowSize == 0)
|
||||
return FALSE;
|
||||
/* get logical row mod */
|
||||
rowMod = mega_mod64(row, raid->rowSize);
|
||||
armQ = raid->rowSize-1-rowMod; /* index of Q drive */
|
||||
arm = armQ+1+logArm; /* data always logically follows Q */
|
||||
if (arm >= raid->rowSize) /* handle wrap condition */
|
||||
arm -= raid->rowSize;
|
||||
physArm = (u8)arm;
|
||||
} else {
|
||||
if (raid->modFactor == 0)
|
||||
return FALSE;
|
||||
physArm = MR_LdDataArmGet(ld, mega_mod64(stripRow,
|
||||
raid->modFactor),
|
||||
map);
|
||||
}
|
||||
|
||||
if (raid->spanDepth == 1) {
|
||||
span = 0;
|
||||
*pdBlock = row << raid->stripeShift;
|
||||
} else {
|
||||
span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map, &error_code);
|
||||
if (error_code == 1)
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* Get the array on which this span is present */
|
||||
arRef = MR_LdSpanArrayGet(ld, span, map);
|
||||
pd = MR_ArPdGet(arRef, physArm, map); /* Get the pd */
|
||||
|
||||
if (pd != MR_PD_INVALID)
|
||||
/* Get dev handle from Pd. */
|
||||
*pDevHandle = MR_PdDevHandleGet(pd, map);
|
||||
else {
|
||||
*pDevHandle = MR_PD_INVALID; /* set dev handle as invalid. */
|
||||
if (raid->level >= 5)
|
||||
pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE;
|
||||
else if (raid->level == 1) {
|
||||
/* Get alternate Pd. */
|
||||
pd = MR_ArPdGet(arRef, physArm + 1, map);
|
||||
if (pd != MR_PD_INVALID)
|
||||
/* Get dev handle from Pd */
|
||||
*pDevHandle = MR_PdDevHandleGet(pd, map);
|
||||
}
|
||||
retval = FALSE;
|
||||
}
|
||||
|
||||
*pdBlock += stripRef + MR_LdSpanPtrGet(ld, span, map)->startBlk;
|
||||
pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
|
||||
physArm;
|
||||
return retval;
|
||||
}
|
||||
|
||||
/*
|
||||
******************************************************************************
|
||||
*
|
||||
* MR_BuildRaidContext function
|
||||
*
|
||||
* This function will initiate command processing. The start/end row and strip
|
||||
* information is calculated then the lock is acquired.
|
||||
* This function will return 0 if region lock was acquired OR return num strips
|
||||
*/
|
||||
u8
|
||||
MR_BuildRaidContext(struct IO_REQUEST_INFO *io_info,
|
||||
struct RAID_CONTEXT *pRAID_Context,
|
||||
struct MR_FW_RAID_MAP_ALL *map)
|
||||
{
|
||||
struct MR_LD_RAID *raid;
|
||||
u32 ld, stripSize, stripe_mask;
|
||||
u64 endLba, endStrip, endRow, start_row, start_strip;
|
||||
u64 regStart;
|
||||
u32 regSize;
|
||||
u8 num_strips, numRows;
|
||||
u16 ref_in_start_stripe, ref_in_end_stripe;
|
||||
u64 ldStartBlock;
|
||||
u32 numBlocks, ldTgtId;
|
||||
u8 isRead;
|
||||
u8 retval = 0;
|
||||
|
||||
ldStartBlock = io_info->ldStartBlock;
|
||||
numBlocks = io_info->numBlocks;
|
||||
ldTgtId = io_info->ldTgtId;
|
||||
isRead = io_info->isRead;
|
||||
|
||||
ld = MR_TargetIdToLdGet(ldTgtId, map);
|
||||
raid = MR_LdRaidGet(ld, map);
|
||||
|
||||
stripSize = 1 << raid->stripeShift;
|
||||
stripe_mask = stripSize-1;
|
||||
/*
|
||||
* calculate starting row and stripe, and number of strips and rows
|
||||
*/
|
||||
start_strip = ldStartBlock >> raid->stripeShift;
|
||||
ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
|
||||
endLba = ldStartBlock + numBlocks - 1;
|
||||
ref_in_end_stripe = (u16)(endLba & stripe_mask);
|
||||
endStrip = endLba >> raid->stripeShift;
|
||||
num_strips = (u8)(endStrip - start_strip + 1); /* End strip */
|
||||
if (raid->rowDataSize == 0)
|
||||
return FALSE;
|
||||
start_row = mega_div64_32(start_strip, raid->rowDataSize);
|
||||
endRow = mega_div64_32(endStrip, raid->rowDataSize);
|
||||
numRows = (u8)(endRow - start_row + 1);
|
||||
|
||||
/*
|
||||
* calculate region info.
|
||||
*/
|
||||
|
||||
/* assume region is at the start of the first row */
|
||||
regStart = start_row << raid->stripeShift;
|
||||
/* assume this IO needs the full row - we'll adjust if not true */
|
||||
regSize = stripSize;
|
||||
|
||||
/* If IO spans more than 1 strip, fp is not possible
|
||||
FP is not possible for writes on non-0 raid levels
|
||||
FP is not possible if LD is not capable */
|
||||
if (num_strips > 1 || (!isRead && raid->level != 0) ||
|
||||
!raid->capability.fpCapable) {
|
||||
io_info->fpOkForIo = FALSE;
|
||||
} else {
|
||||
io_info->fpOkForIo = TRUE;
|
||||
}
|
||||
|
||||
if (numRows == 1) {
|
||||
/* single-strip IOs can always lock only the data needed */
|
||||
if (num_strips == 1) {
|
||||
regStart += ref_in_start_stripe;
|
||||
regSize = numBlocks;
|
||||
}
|
||||
/* multi-strip IOs always need to full stripe locked */
|
||||
} else {
|
||||
if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
|
||||
/* If the start strip is the last in the start row */
|
||||
regStart += ref_in_start_stripe;
|
||||
regSize = stripSize - ref_in_start_stripe;
|
||||
/* initialize count to sectors from startref to end
|
||||
of strip */
|
||||
}
|
||||
|
||||
if (numRows > 2)
|
||||
/* Add complete rows in the middle of the transfer */
|
||||
regSize += (numRows-2) << raid->stripeShift;
|
||||
|
||||
/* if IO ends within first strip of last row */
|
||||
if (endStrip == endRow*raid->rowDataSize)
|
||||
regSize += ref_in_end_stripe+1;
|
||||
else
|
||||
regSize += stripSize;
|
||||
}
|
||||
|
||||
pRAID_Context->timeoutValue = map->raidMap.fpPdIoTimeoutSec;
|
||||
pRAID_Context->regLockFlags = (isRead) ? REGION_TYPE_SHARED_READ :
|
||||
raid->regTypeReqOnWrite;
|
||||
pRAID_Context->VirtualDiskTgtId = raid->targetId;
|
||||
pRAID_Context->regLockRowLBA = regStart;
|
||||
pRAID_Context->regLockLength = regSize;
|
||||
pRAID_Context->configSeqNum = raid->seqNum;
|
||||
|
||||
/*Get Phy Params only if FP capable, or else leave it to MR firmware
|
||||
to do the calculation.*/
|
||||
if (io_info->fpOkForIo) {
|
||||
retval = MR_GetPhyParams(ld, start_strip, ref_in_start_stripe,
|
||||
&io_info->pdBlock,
|
||||
&io_info->devHandle, pRAID_Context,
|
||||
map);
|
||||
/* If IO on an invalid Pd, then FP i snot possible */
|
||||
if (io_info->devHandle == MR_PD_INVALID)
|
||||
io_info->fpOkForIo = FALSE;
|
||||
return retval;
|
||||
} else if (isRead) {
|
||||
uint stripIdx;
|
||||
for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
|
||||
if (!MR_GetPhyParams(ld, start_strip + stripIdx,
|
||||
ref_in_start_stripe,
|
||||
&io_info->pdBlock,
|
||||
&io_info->devHandle,
|
||||
pRAID_Context, map))
|
||||
return TRUE;
|
||||
}
|
||||
}
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
void
|
||||
mr_update_load_balance_params(struct MR_FW_RAID_MAP_ALL *map,
|
||||
struct LD_LOAD_BALANCE_INFO *lbInfo)
|
||||
{
|
||||
int ldCount;
|
||||
u16 ld;
|
||||
struct MR_LD_RAID *raid;
|
||||
|
||||
for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES; ldCount++) {
|
||||
ld = MR_TargetIdToLdGet(ldCount, map);
|
||||
if (ld >= MAX_LOGICAL_DRIVES) {
|
||||
lbInfo[ldCount].loadBalanceFlag = 0;
|
||||
continue;
|
||||
}
|
||||
|
||||
raid = MR_LdRaidGet(ld, map);
|
||||
|
||||
/* Two drive Optimal RAID 1 */
|
||||
if ((raid->level == 1) && (raid->rowSize == 2) &&
|
||||
(raid->spanDepth == 1) && raid->ldState ==
|
||||
MR_LD_STATE_OPTIMAL) {
|
||||
u32 pd, arRef;
|
||||
|
||||
lbInfo[ldCount].loadBalanceFlag = 1;
|
||||
|
||||
/* Get the array on which this span is present */
|
||||
arRef = MR_LdSpanArrayGet(ld, 0, map);
|
||||
|
||||
/* Get the Pd */
|
||||
pd = MR_ArPdGet(arRef, 0, map);
|
||||
/* Get dev handle from Pd */
|
||||
lbInfo[ldCount].raid1DevHandle[0] =
|
||||
MR_PdDevHandleGet(pd, map);
|
||||
/* Get the Pd */
|
||||
pd = MR_ArPdGet(arRef, 1, map);
|
||||
|
||||
/* Get the dev handle from Pd */
|
||||
lbInfo[ldCount].raid1DevHandle[1] =
|
||||
MR_PdDevHandleGet(pd, map);
|
||||
} else
|
||||
lbInfo[ldCount].loadBalanceFlag = 0;
|
||||
}
|
||||
}
|
||||
|
||||
u8 megasas_get_best_arm(struct LD_LOAD_BALANCE_INFO *lbInfo, u8 arm, u64 block,
|
||||
u32 count)
|
||||
{
|
||||
u16 pend0, pend1;
|
||||
u64 diff0, diff1;
|
||||
u8 bestArm;
|
||||
|
||||
/* get the pending cmds for the data and mirror arms */
|
||||
pend0 = atomic_read(&lbInfo->scsi_pending_cmds[0]);
|
||||
pend1 = atomic_read(&lbInfo->scsi_pending_cmds[1]);
|
||||
|
||||
/* Determine the disk whose head is nearer to the req. block */
|
||||
diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[0]);
|
||||
diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[1]);
|
||||
bestArm = (diff0 <= diff1 ? 0 : 1);
|
||||
|
||||
if ((bestArm == arm && pend0 > pend1 + 16) ||
|
||||
(bestArm != arm && pend1 > pend0 + 16))
|
||||
bestArm ^= 1;
|
||||
|
||||
/* Update the last accessed block on the correct pd */
|
||||
lbInfo->last_accessed_block[bestArm] = block + count - 1;
|
||||
|
||||
return bestArm;
|
||||
}
|
||||
|
||||
u16 get_updated_dev_handle(struct LD_LOAD_BALANCE_INFO *lbInfo,
|
||||
struct IO_REQUEST_INFO *io_info)
|
||||
{
|
||||
u8 arm, old_arm;
|
||||
u16 devHandle;
|
||||
|
||||
old_arm = lbInfo->raid1DevHandle[0] == io_info->devHandle ? 0 : 1;
|
||||
|
||||
/* get best new arm */
|
||||
arm = megasas_get_best_arm(lbInfo, old_arm, io_info->ldStartBlock,
|
||||
io_info->numBlocks);
|
||||
devHandle = lbInfo->raid1DevHandle[arm];
|
||||
atomic_inc(&lbInfo->scsi_pending_cmds[arm]);
|
||||
|
||||
return devHandle;
|
||||
}
|
2248
drivers/scsi/megaraid/megaraid_sas_fusion.c
Normal file
2248
drivers/scsi/megaraid/megaraid_sas_fusion.c
Normal file
File diff suppressed because it is too large
Load Diff
695
drivers/scsi/megaraid/megaraid_sas_fusion.h
Normal file
695
drivers/scsi/megaraid/megaraid_sas_fusion.h
Normal file
@ -0,0 +1,695 @@
|
||||
/*
|
||||
* Linux MegaRAID driver for SAS based RAID controllers
|
||||
*
|
||||
* Copyright (c) 2009-2011 LSI Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* FILE: megaraid_sas_fusion.h
|
||||
*
|
||||
* Authors: LSI Corporation
|
||||
* Manoj Jose
|
||||
* Sumant Patro
|
||||
*
|
||||
* Send feedback to: <megaraidlinux@lsi.com>
|
||||
*
|
||||
* Mail to: LSI Corporation, 1621 Barber Lane, Milpitas, CA 95035
|
||||
* ATTN: Linuxraid
|
||||
*/
|
||||
|
||||
#ifndef _MEGARAID_SAS_FUSION_H_
|
||||
#define _MEGARAID_SAS_FUSION_H_
|
||||
|
||||
/* Fusion defines */
|
||||
#define MEGASAS_MAX_SZ_CHAIN_FRAME 1024
|
||||
#define MFI_FUSION_ENABLE_INTERRUPT_MASK (0x00000009)
|
||||
#define MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE 256
|
||||
#define MEGASAS_MPI2_FUNCTION_PASSTHRU_IO_REQUEST 0xF0
|
||||
#define MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST 0xF1
|
||||
#define MEGASAS_LOAD_BALANCE_FLAG 0x1
|
||||
#define MEGASAS_DCMD_MBOX_PEND_FLAG 0x1
|
||||
#define HOST_DIAG_WRITE_ENABLE 0x80
|
||||
#define HOST_DIAG_RESET_ADAPTER 0x4
|
||||
#define MEGASAS_FUSION_MAX_RESET_TRIES 3
|
||||
|
||||
/* T10 PI defines */
|
||||
#define MR_PROT_INFO_TYPE_CONTROLLER 0x8
|
||||
#define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f
|
||||
#define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9
|
||||
#define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB
|
||||
#define MEGASAS_SCSI_ADDL_CDB_LEN 0x18
|
||||
#define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20
|
||||
#define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60
|
||||
#define MEGASAS_EEDPBLOCKSIZE 512
|
||||
|
||||
/*
|
||||
* Raid context flags
|
||||
*/
|
||||
|
||||
#define MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT 0x4
|
||||
#define MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_MASK 0x30
|
||||
enum MR_RAID_FLAGS_IO_SUB_TYPE {
|
||||
MR_RAID_FLAGS_IO_SUB_TYPE_NONE = 0,
|
||||
MR_RAID_FLAGS_IO_SUB_TYPE_SYSTEM_PD = 1,
|
||||
};
|
||||
|
||||
/*
|
||||
* Request descriptor types
|
||||
*/
|
||||
#define MEGASAS_REQ_DESCRIPT_FLAGS_LD_IO 0x7
|
||||
#define MEGASAS_REQ_DESCRIPT_FLAGS_MFA 0x1
|
||||
|
||||
#define MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 1
|
||||
|
||||
#define MEGASAS_FP_CMD_LEN 16
|
||||
#define MEGASAS_FUSION_IN_RESET 0
|
||||
|
||||
/*
|
||||
* Raid Context structure which describes MegaRAID specific IO Paramenters
|
||||
* This resides at offset 0x60 where the SGL normally starts in MPT IO Frames
|
||||
*/
|
||||
|
||||
struct RAID_CONTEXT {
|
||||
u16 resvd0;
|
||||
u16 timeoutValue;
|
||||
u8 regLockFlags;
|
||||
u8 resvd1;
|
||||
u16 VirtualDiskTgtId;
|
||||
u64 regLockRowLBA;
|
||||
u32 regLockLength;
|
||||
u16 nextLMId;
|
||||
u8 exStatus;
|
||||
u8 status;
|
||||
u8 RAIDFlags;
|
||||
u8 numSGE;
|
||||
u16 configSeqNum;
|
||||
u8 spanArm;
|
||||
u8 resvd2[3];
|
||||
};
|
||||
|
||||
#define RAID_CTX_SPANARM_ARM_SHIFT (0)
|
||||
#define RAID_CTX_SPANARM_ARM_MASK (0x1f)
|
||||
|
||||
#define RAID_CTX_SPANARM_SPAN_SHIFT (5)
|
||||
#define RAID_CTX_SPANARM_SPAN_MASK (0xE0)
|
||||
|
||||
/*
|
||||
* define region lock types
|
||||
*/
|
||||
enum REGION_TYPE {
|
||||
REGION_TYPE_UNUSED = 0,
|
||||
REGION_TYPE_SHARED_READ = 1,
|
||||
REGION_TYPE_SHARED_WRITE = 2,
|
||||
REGION_TYPE_EXCLUSIVE = 3,
|
||||
};
|
||||
|
||||
/* MPI2 defines */
|
||||
#define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */
|
||||
#define MPI2_WHOINIT_HOST_DRIVER (0x04)
|
||||
#define MPI2_VERSION_MAJOR (0x02)
|
||||
#define MPI2_VERSION_MINOR (0x00)
|
||||
#define MPI2_VERSION_MAJOR_MASK (0xFF00)
|
||||
#define MPI2_VERSION_MAJOR_SHIFT (8)
|
||||
#define MPI2_VERSION_MINOR_MASK (0x00FF)
|
||||
#define MPI2_VERSION_MINOR_SHIFT (0)
|
||||
#define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
|
||||
MPI2_VERSION_MINOR)
|
||||
#define MPI2_HEADER_VERSION_UNIT (0x10)
|
||||
#define MPI2_HEADER_VERSION_DEV (0x00)
|
||||
#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
|
||||
#define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
|
||||
#define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
|
||||
#define MPI2_HEADER_VERSION_DEV_SHIFT (0)
|
||||
#define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | \
|
||||
MPI2_HEADER_VERSION_DEV)
|
||||
#define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
|
||||
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
|
||||
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
|
||||
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
|
||||
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
|
||||
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
|
||||
#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
|
||||
#define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */
|
||||
#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
|
||||
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
|
||||
#define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
|
||||
#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
|
||||
#define MPI2_SCSIIO_CONTROL_READ (0x02000000)
|
||||
#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
|
||||
#define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
|
||||
#define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
|
||||
#define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
|
||||
#define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
|
||||
#define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
|
||||
#define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
|
||||
#define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
|
||||
#define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
|
||||
#define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
|
||||
#define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
|
||||
#define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
|
||||
|
||||
struct MPI25_IEEE_SGE_CHAIN64 {
|
||||
u64 Address;
|
||||
u32 Length;
|
||||
u16 Reserved1;
|
||||
u8 NextChainOffset;
|
||||
u8 Flags;
|
||||
};
|
||||
|
||||
struct MPI2_SGE_SIMPLE_UNION {
|
||||
u32 FlagsLength;
|
||||
union {
|
||||
u32 Address32;
|
||||
u64 Address64;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct MPI2_SCSI_IO_CDB_EEDP32 {
|
||||
u8 CDB[20]; /* 0x00 */
|
||||
u32 PrimaryReferenceTag; /* 0x14 */
|
||||
u16 PrimaryApplicationTag; /* 0x18 */
|
||||
u16 PrimaryApplicationTagMask; /* 0x1A */
|
||||
u32 TransferLength; /* 0x1C */
|
||||
};
|
||||
|
||||
struct MPI2_SGE_CHAIN_UNION {
|
||||
u16 Length;
|
||||
u8 NextChainOffset;
|
||||
u8 Flags;
|
||||
union {
|
||||
u32 Address32;
|
||||
u64 Address64;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct MPI2_IEEE_SGE_SIMPLE32 {
|
||||
u32 Address;
|
||||
u32 FlagsLength;
|
||||
};
|
||||
|
||||
struct MPI2_IEEE_SGE_CHAIN32 {
|
||||
u32 Address;
|
||||
u32 FlagsLength;
|
||||
};
|
||||
|
||||
struct MPI2_IEEE_SGE_SIMPLE64 {
|
||||
u64 Address;
|
||||
u32 Length;
|
||||
u16 Reserved1;
|
||||
u8 Reserved2;
|
||||
u8 Flags;
|
||||
};
|
||||
|
||||
struct MPI2_IEEE_SGE_CHAIN64 {
|
||||
u64 Address;
|
||||
u32 Length;
|
||||
u16 Reserved1;
|
||||
u8 Reserved2;
|
||||
u8 Flags;
|
||||
};
|
||||
|
||||
union MPI2_IEEE_SGE_SIMPLE_UNION {
|
||||
struct MPI2_IEEE_SGE_SIMPLE32 Simple32;
|
||||
struct MPI2_IEEE_SGE_SIMPLE64 Simple64;
|
||||
};
|
||||
|
||||
union MPI2_IEEE_SGE_CHAIN_UNION {
|
||||
struct MPI2_IEEE_SGE_CHAIN32 Chain32;
|
||||
struct MPI2_IEEE_SGE_CHAIN64 Chain64;
|
||||
};
|
||||
|
||||
union MPI2_SGE_IO_UNION {
|
||||
struct MPI2_SGE_SIMPLE_UNION MpiSimple;
|
||||
struct MPI2_SGE_CHAIN_UNION MpiChain;
|
||||
union MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
|
||||
union MPI2_IEEE_SGE_CHAIN_UNION IeeeChain;
|
||||
};
|
||||
|
||||
union MPI2_SCSI_IO_CDB_UNION {
|
||||
u8 CDB32[32];
|
||||
struct MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
|
||||
struct MPI2_SGE_SIMPLE_UNION SGE;
|
||||
};
|
||||
|
||||
/*
|
||||
* RAID SCSI IO Request Message
|
||||
* Total SGE count will be one less than _MPI2_SCSI_IO_REQUEST
|
||||
*/
|
||||
struct MPI2_RAID_SCSI_IO_REQUEST {
|
||||
u16 DevHandle; /* 0x00 */
|
||||
u8 ChainOffset; /* 0x02 */
|
||||
u8 Function; /* 0x03 */
|
||||
u16 Reserved1; /* 0x04 */
|
||||
u8 Reserved2; /* 0x06 */
|
||||
u8 MsgFlags; /* 0x07 */
|
||||
u8 VP_ID; /* 0x08 */
|
||||
u8 VF_ID; /* 0x09 */
|
||||
u16 Reserved3; /* 0x0A */
|
||||
u32 SenseBufferLowAddress; /* 0x0C */
|
||||
u16 SGLFlags; /* 0x10 */
|
||||
u8 SenseBufferLength; /* 0x12 */
|
||||
u8 Reserved4; /* 0x13 */
|
||||
u8 SGLOffset0; /* 0x14 */
|
||||
u8 SGLOffset1; /* 0x15 */
|
||||
u8 SGLOffset2; /* 0x16 */
|
||||
u8 SGLOffset3; /* 0x17 */
|
||||
u32 SkipCount; /* 0x18 */
|
||||
u32 DataLength; /* 0x1C */
|
||||
u32 BidirectionalDataLength; /* 0x20 */
|
||||
u16 IoFlags; /* 0x24 */
|
||||
u16 EEDPFlags; /* 0x26 */
|
||||
u32 EEDPBlockSize; /* 0x28 */
|
||||
u32 SecondaryReferenceTag; /* 0x2C */
|
||||
u16 SecondaryApplicationTag; /* 0x30 */
|
||||
u16 ApplicationTagTranslationMask; /* 0x32 */
|
||||
u8 LUN[8]; /* 0x34 */
|
||||
u32 Control; /* 0x3C */
|
||||
union MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */
|
||||
struct RAID_CONTEXT RaidContext; /* 0x60 */
|
||||
union MPI2_SGE_IO_UNION SGL; /* 0x80 */
|
||||
};
|
||||
|
||||
/*
|
||||
* MPT RAID MFA IO Descriptor.
|
||||
*/
|
||||
struct MEGASAS_RAID_MFA_IO_REQUEST_DESCRIPTOR {
|
||||
u32 RequestFlags:8;
|
||||
u32 MessageAddress1:24; /* bits 31:8*/
|
||||
u32 MessageAddress2; /* bits 61:32 */
|
||||
};
|
||||
|
||||
/* Default Request Descriptor */
|
||||
struct MPI2_DEFAULT_REQUEST_DESCRIPTOR {
|
||||
u8 RequestFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 SMID; /* 0x02 */
|
||||
u16 LMID; /* 0x04 */
|
||||
u16 DescriptorTypeDependent; /* 0x06 */
|
||||
};
|
||||
|
||||
/* High Priority Request Descriptor */
|
||||
struct MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR {
|
||||
u8 RequestFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 SMID; /* 0x02 */
|
||||
u16 LMID; /* 0x04 */
|
||||
u16 Reserved1; /* 0x06 */
|
||||
};
|
||||
|
||||
/* SCSI IO Request Descriptor */
|
||||
struct MPI2_SCSI_IO_REQUEST_DESCRIPTOR {
|
||||
u8 RequestFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 SMID; /* 0x02 */
|
||||
u16 LMID; /* 0x04 */
|
||||
u16 DevHandle; /* 0x06 */
|
||||
};
|
||||
|
||||
/* SCSI Target Request Descriptor */
|
||||
struct MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR {
|
||||
u8 RequestFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 SMID; /* 0x02 */
|
||||
u16 LMID; /* 0x04 */
|
||||
u16 IoIndex; /* 0x06 */
|
||||
};
|
||||
|
||||
/* RAID Accelerator Request Descriptor */
|
||||
struct MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR {
|
||||
u8 RequestFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 SMID; /* 0x02 */
|
||||
u16 LMID; /* 0x04 */
|
||||
u16 Reserved; /* 0x06 */
|
||||
};
|
||||
|
||||
/* union of Request Descriptors */
|
||||
union MEGASAS_REQUEST_DESCRIPTOR_UNION {
|
||||
struct MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
|
||||
struct MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
|
||||
struct MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
|
||||
struct MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
|
||||
struct MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator;
|
||||
struct MEGASAS_RAID_MFA_IO_REQUEST_DESCRIPTOR MFAIo;
|
||||
union {
|
||||
struct {
|
||||
u32 low;
|
||||
u32 high;
|
||||
} u;
|
||||
u64 Words;
|
||||
};
|
||||
};
|
||||
|
||||
/* Default Reply Descriptor */
|
||||
struct MPI2_DEFAULT_REPLY_DESCRIPTOR {
|
||||
u8 ReplyFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 DescriptorTypeDependent1; /* 0x02 */
|
||||
u32 DescriptorTypeDependent2; /* 0x04 */
|
||||
};
|
||||
|
||||
/* Address Reply Descriptor */
|
||||
struct MPI2_ADDRESS_REPLY_DESCRIPTOR {
|
||||
u8 ReplyFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 SMID; /* 0x02 */
|
||||
u32 ReplyFrameAddress; /* 0x04 */
|
||||
};
|
||||
|
||||
/* SCSI IO Success Reply Descriptor */
|
||||
struct MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR {
|
||||
u8 ReplyFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 SMID; /* 0x02 */
|
||||
u16 TaskTag; /* 0x04 */
|
||||
u16 Reserved1; /* 0x06 */
|
||||
};
|
||||
|
||||
/* TargetAssist Success Reply Descriptor */
|
||||
struct MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR {
|
||||
u8 ReplyFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 SMID; /* 0x02 */
|
||||
u8 SequenceNumber; /* 0x04 */
|
||||
u8 Reserved1; /* 0x05 */
|
||||
u16 IoIndex; /* 0x06 */
|
||||
};
|
||||
|
||||
/* Target Command Buffer Reply Descriptor */
|
||||
struct MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR {
|
||||
u8 ReplyFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u8 VP_ID; /* 0x02 */
|
||||
u8 Flags; /* 0x03 */
|
||||
u16 InitiatorDevHandle; /* 0x04 */
|
||||
u16 IoIndex; /* 0x06 */
|
||||
};
|
||||
|
||||
/* RAID Accelerator Success Reply Descriptor */
|
||||
struct MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR {
|
||||
u8 ReplyFlags; /* 0x00 */
|
||||
u8 MSIxIndex; /* 0x01 */
|
||||
u16 SMID; /* 0x02 */
|
||||
u32 Reserved; /* 0x04 */
|
||||
};
|
||||
|
||||
/* union of Reply Descriptors */
|
||||
union MPI2_REPLY_DESCRIPTORS_UNION {
|
||||
struct MPI2_DEFAULT_REPLY_DESCRIPTOR Default;
|
||||
struct MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply;
|
||||
struct MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess;
|
||||
struct MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess;
|
||||
struct MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer;
|
||||
struct MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR
|
||||
RAIDAcceleratorSuccess;
|
||||
u64 Words;
|
||||
};
|
||||
|
||||
/* IOCInit Request message */
|
||||
struct MPI2_IOC_INIT_REQUEST {
|
||||
u8 WhoInit; /* 0x00 */
|
||||
u8 Reserved1; /* 0x01 */
|
||||
u8 ChainOffset; /* 0x02 */
|
||||
u8 Function; /* 0x03 */
|
||||
u16 Reserved2; /* 0x04 */
|
||||
u8 Reserved3; /* 0x06 */
|
||||
u8 MsgFlags; /* 0x07 */
|
||||
u8 VP_ID; /* 0x08 */
|
||||
u8 VF_ID; /* 0x09 */
|
||||
u16 Reserved4; /* 0x0A */
|
||||
u16 MsgVersion; /* 0x0C */
|
||||
u16 HeaderVersion; /* 0x0E */
|
||||
u32 Reserved5; /* 0x10 */
|
||||
u16 Reserved6; /* 0x14 */
|
||||
u8 Reserved7; /* 0x16 */
|
||||
u8 HostMSIxVectors; /* 0x17 */
|
||||
u16 Reserved8; /* 0x18 */
|
||||
u16 SystemRequestFrameSize; /* 0x1A */
|
||||
u16 ReplyDescriptorPostQueueDepth; /* 0x1C */
|
||||
u16 ReplyFreeQueueDepth; /* 0x1E */
|
||||
u32 SenseBufferAddressHigh; /* 0x20 */
|
||||
u32 SystemReplyAddressHigh; /* 0x24 */
|
||||
u64 SystemRequestFrameBaseAddress; /* 0x28 */
|
||||
u64 ReplyDescriptorPostQueueAddress;/* 0x30 */
|
||||
u64 ReplyFreeQueueAddress; /* 0x38 */
|
||||
u64 TimeStamp; /* 0x40 */
|
||||
};
|
||||
|
||||
/* mrpriv defines */
|
||||
#define MR_PD_INVALID 0xFFFF
|
||||
#define MAX_SPAN_DEPTH 8
|
||||
#define MAX_RAIDMAP_SPAN_DEPTH (MAX_SPAN_DEPTH)
|
||||
#define MAX_ROW_SIZE 32
|
||||
#define MAX_RAIDMAP_ROW_SIZE (MAX_ROW_SIZE)
|
||||
#define MAX_LOGICAL_DRIVES 64
|
||||
#define MAX_RAIDMAP_LOGICAL_DRIVES (MAX_LOGICAL_DRIVES)
|
||||
#define MAX_RAIDMAP_VIEWS (MAX_LOGICAL_DRIVES)
|
||||
#define MAX_ARRAYS 128
|
||||
#define MAX_RAIDMAP_ARRAYS (MAX_ARRAYS)
|
||||
#define MAX_PHYSICAL_DEVICES 256
|
||||
#define MAX_RAIDMAP_PHYSICAL_DEVICES (MAX_PHYSICAL_DEVICES)
|
||||
#define MR_DCMD_LD_MAP_GET_INFO 0x0300e101
|
||||
|
||||
struct MR_DEV_HANDLE_INFO {
|
||||
u16 curDevHdl;
|
||||
u8 validHandles;
|
||||
u8 reserved;
|
||||
u16 devHandle[2];
|
||||
};
|
||||
|
||||
struct MR_ARRAY_INFO {
|
||||
u16 pd[MAX_RAIDMAP_ROW_SIZE];
|
||||
};
|
||||
|
||||
struct MR_QUAD_ELEMENT {
|
||||
u64 logStart;
|
||||
u64 logEnd;
|
||||
u64 offsetInSpan;
|
||||
u32 diff;
|
||||
u32 reserved1;
|
||||
};
|
||||
|
||||
struct MR_SPAN_INFO {
|
||||
u32 noElements;
|
||||
u32 reserved1;
|
||||
struct MR_QUAD_ELEMENT quad[MAX_RAIDMAP_SPAN_DEPTH];
|
||||
};
|
||||
|
||||
struct MR_LD_SPAN {
|
||||
u64 startBlk;
|
||||
u64 numBlks;
|
||||
u16 arrayRef;
|
||||
u8 reserved[6];
|
||||
};
|
||||
|
||||
struct MR_SPAN_BLOCK_INFO {
|
||||
u64 num_rows;
|
||||
struct MR_LD_SPAN span;
|
||||
struct MR_SPAN_INFO block_span_info;
|
||||
};
|
||||
|
||||
struct MR_LD_RAID {
|
||||
struct {
|
||||
u32 fpCapable:1;
|
||||
u32 reserved5:3;
|
||||
u32 ldPiMode:4;
|
||||
u32 pdPiMode:4;
|
||||
u32 encryptionType:8;
|
||||
u32 fpWriteCapable:1;
|
||||
u32 fpReadCapable:1;
|
||||
u32 fpWriteAcrossStripe:1;
|
||||
u32 fpReadAcrossStripe:1;
|
||||
u32 reserved4:8;
|
||||
} capability;
|
||||
u32 reserved6;
|
||||
u64 size;
|
||||
u8 spanDepth;
|
||||
u8 level;
|
||||
u8 stripeShift;
|
||||
u8 rowSize;
|
||||
u8 rowDataSize;
|
||||
u8 writeMode;
|
||||
u8 PRL;
|
||||
u8 SRL;
|
||||
u16 targetId;
|
||||
u8 ldState;
|
||||
u8 regTypeReqOnWrite;
|
||||
u8 modFactor;
|
||||
u8 reserved2[1];
|
||||
u16 seqNum;
|
||||
|
||||
struct {
|
||||
u32 ldSyncRequired:1;
|
||||
u32 reserved:31;
|
||||
} flags;
|
||||
|
||||
u8 reserved3[0x5C];
|
||||
};
|
||||
|
||||
struct MR_LD_SPAN_MAP {
|
||||
struct MR_LD_RAID ldRaid;
|
||||
u8 dataArmMap[MAX_RAIDMAP_ROW_SIZE];
|
||||
struct MR_SPAN_BLOCK_INFO spanBlock[MAX_RAIDMAP_SPAN_DEPTH];
|
||||
};
|
||||
|
||||
struct MR_FW_RAID_MAP {
|
||||
u32 totalSize;
|
||||
union {
|
||||
struct {
|
||||
u32 maxLd;
|
||||
u32 maxSpanDepth;
|
||||
u32 maxRowSize;
|
||||
u32 maxPdCount;
|
||||
u32 maxArrays;
|
||||
} validationInfo;
|
||||
u32 version[5];
|
||||
u32 reserved1[5];
|
||||
};
|
||||
|
||||
u32 ldCount;
|
||||
u32 Reserved1;
|
||||
u8 ldTgtIdToLd[MAX_RAIDMAP_LOGICAL_DRIVES+
|
||||
MAX_RAIDMAP_VIEWS];
|
||||
u8 fpPdIoTimeoutSec;
|
||||
u8 reserved2[7];
|
||||
struct MR_ARRAY_INFO arMapInfo[MAX_RAIDMAP_ARRAYS];
|
||||
struct MR_DEV_HANDLE_INFO devHndlInfo[MAX_RAIDMAP_PHYSICAL_DEVICES];
|
||||
struct MR_LD_SPAN_MAP ldSpanMap[1];
|
||||
};
|
||||
|
||||
struct IO_REQUEST_INFO {
|
||||
u64 ldStartBlock;
|
||||
u32 numBlocks;
|
||||
u16 ldTgtId;
|
||||
u8 isRead;
|
||||
u16 devHandle;
|
||||
u64 pdBlock;
|
||||
u8 fpOkForIo;
|
||||
};
|
||||
|
||||
struct MR_LD_TARGET_SYNC {
|
||||
u8 targetId;
|
||||
u8 reserved;
|
||||
u16 seqNum;
|
||||
};
|
||||
|
||||
#define IEEE_SGE_FLAGS_ADDR_MASK (0x03)
|
||||
#define IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
|
||||
#define IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
|
||||
#define IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
|
||||
#define IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
|
||||
#define IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
|
||||
#define IEEE_SGE_FLAGS_END_OF_LIST (0x40)
|
||||
|
||||
struct megasas_register_set;
|
||||
struct megasas_instance;
|
||||
|
||||
union desc_word {
|
||||
u64 word;
|
||||
struct {
|
||||
u32 low;
|
||||
u32 high;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct megasas_cmd_fusion {
|
||||
struct MPI2_RAID_SCSI_IO_REQUEST *io_request;
|
||||
dma_addr_t io_request_phys_addr;
|
||||
|
||||
union MPI2_SGE_IO_UNION *sg_frame;
|
||||
dma_addr_t sg_frame_phys_addr;
|
||||
|
||||
u8 *sense;
|
||||
dma_addr_t sense_phys_addr;
|
||||
|
||||
struct list_head list;
|
||||
struct scsi_cmnd *scmd;
|
||||
struct megasas_instance *instance;
|
||||
|
||||
u8 retry_for_fw_reset;
|
||||
union MEGASAS_REQUEST_DESCRIPTOR_UNION *request_desc;
|
||||
|
||||
/*
|
||||
* Context for a MFI frame.
|
||||
* Used to get the mfi cmd from list when a MFI cmd is completed
|
||||
*/
|
||||
u32 sync_cmd_idx;
|
||||
u32 index;
|
||||
u8 flags;
|
||||
};
|
||||
|
||||
struct LD_LOAD_BALANCE_INFO {
|
||||
u8 loadBalanceFlag;
|
||||
u8 reserved1;
|
||||
u16 raid1DevHandle[2];
|
||||
atomic_t scsi_pending_cmds[2];
|
||||
u64 last_accessed_block[2];
|
||||
};
|
||||
|
||||
struct MR_FW_RAID_MAP_ALL {
|
||||
struct MR_FW_RAID_MAP raidMap;
|
||||
struct MR_LD_SPAN_MAP ldSpanMap[MAX_LOGICAL_DRIVES - 1];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
struct fusion_context {
|
||||
struct megasas_cmd_fusion **cmd_list;
|
||||
struct list_head cmd_pool;
|
||||
|
||||
spinlock_t cmd_pool_lock;
|
||||
|
||||
dma_addr_t req_frames_desc_phys;
|
||||
u8 *req_frames_desc;
|
||||
|
||||
struct dma_pool *io_request_frames_pool;
|
||||
dma_addr_t io_request_frames_phys;
|
||||
u8 *io_request_frames;
|
||||
|
||||
struct dma_pool *sg_dma_pool;
|
||||
struct dma_pool *sense_dma_pool;
|
||||
|
||||
dma_addr_t reply_frames_desc_phys;
|
||||
union MPI2_REPLY_DESCRIPTORS_UNION *reply_frames_desc;
|
||||
struct dma_pool *reply_frames_desc_pool;
|
||||
|
||||
u16 last_reply_idx;
|
||||
|
||||
u32 reply_q_depth;
|
||||
u32 request_alloc_sz;
|
||||
u32 reply_alloc_sz;
|
||||
u32 io_frames_alloc_sz;
|
||||
|
||||
u16 max_sge_in_main_msg;
|
||||
u16 max_sge_in_chain;
|
||||
|
||||
u8 chain_offset_io_request;
|
||||
u8 chain_offset_mfi_pthru;
|
||||
|
||||
struct MR_FW_RAID_MAP_ALL *ld_map[2];
|
||||
dma_addr_t ld_map_phys[2];
|
||||
|
||||
u32 map_sz;
|
||||
u8 fast_path_io;
|
||||
struct LD_LOAD_BALANCE_INFO load_balance_info[MAX_LOGICAL_DRIVES];
|
||||
};
|
||||
|
||||
union desc_value {
|
||||
u64 word;
|
||||
struct {
|
||||
u32 low;
|
||||
u32 high;
|
||||
} u;
|
||||
};
|
||||
|
||||
#endif /* _MEGARAID_SAS_FUSION_H_ */
|
Loading…
Reference in New Issue
Block a user