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https://github.com/edk2-porting/linux-next.git
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Blackfin arch: move most dma functions into static inlines
move most dma functions into static inlines since they are vastly 1 liners that get/set a value in a structure Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Mike Frysinger
Bryan Wu
parent
4c1ed6a57b
commit
9c417a4329
@ -129,50 +129,126 @@ void blackfin_dma_resume(void);
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/*******************************************************************************
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* DMA API's
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*******************************************************************************/
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/* functions to set register mode */
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void set_dma_start_addr(unsigned int channel, unsigned long addr);
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void set_dma_next_desc_addr(unsigned int channel, unsigned long addr);
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void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr);
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void set_dma_x_count(unsigned int channel, unsigned short x_count);
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void set_dma_x_modify(unsigned int channel, short x_modify);
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void set_dma_y_count(unsigned int channel, unsigned short y_count);
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void set_dma_y_modify(unsigned int channel, short y_modify);
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void set_dma_config(unsigned int channel, unsigned short config);
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unsigned short set_bfin_dma_config(char direction, char flow_mode,
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char intr_mode, char dma_mode, char width,
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char syncmode);
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void set_dma_curr_addr(unsigned int channel, unsigned long addr);
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extern struct dma_channel dma_ch[MAX_DMA_CHANNELS];
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extern struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS];
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extern int channel2irq(unsigned int channel);
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/* get curr status for polling */
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unsigned short get_dma_curr_irqstat(unsigned int channel);
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unsigned short get_dma_curr_xcount(unsigned int channel);
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unsigned short get_dma_curr_ycount(unsigned int channel);
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unsigned long get_dma_next_desc_ptr(unsigned int channel);
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unsigned long get_dma_curr_desc_ptr(unsigned int channel);
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unsigned long get_dma_curr_addr(unsigned int channel);
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static inline void set_dma_start_addr(unsigned int channel, unsigned long addr)
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{
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dma_ch[channel].regs->start_addr = addr;
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}
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static inline void set_dma_next_desc_addr(unsigned int channel, unsigned long addr)
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{
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dma_ch[channel].regs->next_desc_ptr = addr;
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}
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static inline void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr)
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{
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dma_ch[channel].regs->curr_desc_ptr = addr;
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}
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static inline void set_dma_x_count(unsigned int channel, unsigned short x_count)
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{
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dma_ch[channel].regs->x_count = x_count;
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}
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static inline void set_dma_y_count(unsigned int channel, unsigned short y_count)
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{
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dma_ch[channel].regs->y_count = y_count;
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}
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static inline void set_dma_x_modify(unsigned int channel, short x_modify)
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{
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dma_ch[channel].regs->x_modify = x_modify;
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}
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static inline void set_dma_y_modify(unsigned int channel, short y_modify)
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{
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dma_ch[channel].regs->y_modify = y_modify;
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}
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static inline void set_dma_config(unsigned int channel, unsigned short config)
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{
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dma_ch[channel].regs->cfg = config;
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}
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static inline void set_dma_curr_addr(unsigned int channel, unsigned long addr)
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{
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dma_ch[channel].regs->curr_addr_ptr = addr;
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}
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/* set large DMA mode descriptor */
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void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg);
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static inline unsigned short
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set_bfin_dma_config(char direction, char flow_mode,
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char intr_mode, char dma_mode, char width, char syncmode)
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{
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return (direction << 1) | (width << 2) | (dma_mode << 4) |
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(intr_mode << 6) | (flow_mode << 12) | (syncmode << 5);
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}
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/* check if current channel is in use */
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int dma_channel_active(unsigned int channel);
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static inline unsigned short get_dma_curr_irqstat(unsigned int channel)
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{
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return dma_ch[channel].regs->irq_status;
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}
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static inline unsigned short get_dma_curr_xcount(unsigned int channel)
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{
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return dma_ch[channel].regs->curr_x_count;
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}
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static inline unsigned short get_dma_curr_ycount(unsigned int channel)
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{
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return dma_ch[channel].regs->curr_y_count;
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}
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static inline unsigned long get_dma_next_desc_ptr(unsigned int channel)
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{
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return dma_ch[channel].regs->next_desc_ptr;
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}
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static inline unsigned long get_dma_curr_desc_ptr(unsigned int channel)
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{
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return dma_ch[channel].regs->curr_desc_ptr;
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}
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static inline unsigned long get_dma_curr_addr(unsigned int channel)
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{
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return dma_ch[channel].regs->curr_addr_ptr;
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}
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/* common functions must be called in any mode */
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static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize)
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{
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dma_ch[channel].regs->cfg |= ((ndsize & 0x0F) << 8);
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dma_ch[channel].regs->next_desc_ptr = (unsigned long)sg;
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}
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static inline int dma_channel_active(unsigned int channel)
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{
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if (dma_ch[channel].chan_status == DMA_CHANNEL_FREE)
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return 0;
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else
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return 1;
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}
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static inline void disable_dma(unsigned int channel)
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{
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dma_ch[channel].regs->cfg &= ~DMAEN;
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SSYNC();
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dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED;
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}
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static inline void enable_dma(unsigned int channel)
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{
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dma_ch[channel].regs->curr_x_count = 0;
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dma_ch[channel].regs->curr_y_count = 0;
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dma_ch[channel].regs->cfg |= DMAEN;
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dma_ch[channel].chan_status = DMA_CHANNEL_ENABLED;
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}
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void free_dma(unsigned int channel);
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int dma_channel_active(unsigned int channel); /* check if a channel is in use */
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void disable_dma(unsigned int channel);
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void enable_dma(unsigned int channel);
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int request_dma(unsigned int channel, const char *device_id);
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int set_dma_callback(unsigned int channel, irq_handler_t callback,
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void *data);
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void dma_disable_irq(unsigned int channel);
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void dma_enable_irq(unsigned int channel);
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void clear_dma_irqstat(unsigned int channel);
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int set_dma_callback(unsigned int channel, irq_handler_t callback, void *data);
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static inline void dma_disable_irq(unsigned int channel)
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{
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disable_irq(dma_ch[channel].irq);
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}
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static inline void dma_enable_irq(unsigned int channel)
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{
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enable_irq(dma_ch[channel].irq);
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}
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static inline void clear_dma_irqstat(unsigned int channel)
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{
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dma_ch[channel].regs->irq_status = DMA_DONE | DMA_ERR;
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}
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void *dma_memcpy(void *dest, const void *src, size_t count);
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void *safe_dma_memcpy(void *dest, const void *src, size_t count);
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void blackfin_dma_early_init(void);
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extern int channel2irq(unsigned int channel);
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extern struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS];
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#endif
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@ -1,7 +1,7 @@
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/*
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* bfin_dma_5xx.c - Blackfin DMA implementation
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*
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* Copyright 2004-2006 Analog Devices Inc.
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* Copyright 2004-2008 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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*/
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@ -20,22 +20,8 @@
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#include <asm/dma.h>
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#include <asm/uaccess.h>
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/**************************************************************************
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* Global Variables
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***************************************************************************/
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static struct dma_channel dma_ch[MAX_DMA_CHANNELS];
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/*------------------------------------------------------------------------------
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* Set the Buffer Clear bit in the Configuration register of specific DMA
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* channel. This will stop the descriptor based DMA operation.
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*-----------------------------------------------------------------------------*/
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static void clear_dma_buffer(unsigned int channel)
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{
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dma_ch[channel].regs->cfg |= RESTART;
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SSYNC();
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dma_ch[channel].regs->cfg &= ~RESTART;
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}
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struct dma_channel dma_ch[MAX_DMA_CHANNELS];
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EXPORT_SYMBOL(dma_ch);
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static int __init blackfin_dma_init(void)
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{
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@ -92,9 +78,11 @@ static int __init proc_dma_init(void)
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late_initcall(proc_dma_init);
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#endif
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/*------------------------------------------------------------------------------
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* Request the specific DMA channel from the system.
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*-----------------------------------------------------------------------------*/
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/**
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* request_dma - request a DMA channel
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*
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* Request the specific DMA channel from the system if it's available.
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*/
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int request_dma(unsigned int channel, const char *device_id)
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{
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pr_debug("request_dma() : BEGIN \n");
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@ -172,6 +160,19 @@ int set_dma_callback(unsigned int channel, irq_handler_t callback, void *data)
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}
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EXPORT_SYMBOL(set_dma_callback);
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/**
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* clear_dma_buffer - clear DMA fifos for specified channel
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*
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* Set the Buffer Clear bit in the Configuration register of specific DMA
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* channel. This will stop the descriptor based DMA operation.
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*/
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static void clear_dma_buffer(unsigned int channel)
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{
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dma_ch[channel].regs->cfg |= RESTART;
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SSYNC();
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dma_ch[channel].regs->cfg &= ~RESTART;
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}
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void free_dma(unsigned int channel)
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{
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pr_debug("freedma() : BEGIN \n");
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@ -194,198 +195,6 @@ void free_dma(unsigned int channel)
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}
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EXPORT_SYMBOL(free_dma);
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void dma_enable_irq(unsigned int channel)
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{
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pr_debug("dma_enable_irq() : BEGIN \n");
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enable_irq(dma_ch[channel].irq);
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}
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EXPORT_SYMBOL(dma_enable_irq);
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void dma_disable_irq(unsigned int channel)
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{
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pr_debug("dma_disable_irq() : BEGIN \n");
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disable_irq(dma_ch[channel].irq);
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}
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EXPORT_SYMBOL(dma_disable_irq);
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int dma_channel_active(unsigned int channel)
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{
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if (dma_ch[channel].chan_status == DMA_CHANNEL_FREE) {
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return 0;
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} else {
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return 1;
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}
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}
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EXPORT_SYMBOL(dma_channel_active);
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/*------------------------------------------------------------------------------
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* stop the specific DMA channel.
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*-----------------------------------------------------------------------------*/
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void disable_dma(unsigned int channel)
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{
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pr_debug("stop_dma() : BEGIN \n");
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dma_ch[channel].regs->cfg &= ~DMAEN; /* Clean the enable bit */
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SSYNC();
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dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED;
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/* Needs to be enabled Later */
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pr_debug("stop_dma() : END \n");
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return;
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}
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EXPORT_SYMBOL(disable_dma);
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void enable_dma(unsigned int channel)
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{
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pr_debug("enable_dma() : BEGIN \n");
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dma_ch[channel].chan_status = DMA_CHANNEL_ENABLED;
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dma_ch[channel].regs->curr_x_count = 0;
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dma_ch[channel].regs->curr_y_count = 0;
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dma_ch[channel].regs->cfg |= DMAEN; /* Set the enable bit */
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pr_debug("enable_dma() : END \n");
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return;
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}
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EXPORT_SYMBOL(enable_dma);
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/*------------------------------------------------------------------------------
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* Set the Start Address register for the specific DMA channel
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* This function can be used for register based DMA,
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* to setup the start address
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* addr: Starting address of the DMA Data to be transferred.
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*-----------------------------------------------------------------------------*/
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void set_dma_start_addr(unsigned int channel, unsigned long addr)
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{
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pr_debug("set_dma_start_addr() : BEGIN \n");
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dma_ch[channel].regs->start_addr = addr;
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pr_debug("set_dma_start_addr() : END\n");
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}
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EXPORT_SYMBOL(set_dma_start_addr);
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void set_dma_next_desc_addr(unsigned int channel, unsigned long addr)
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{
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pr_debug("set_dma_next_desc_addr() : BEGIN \n");
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dma_ch[channel].regs->next_desc_ptr = addr;
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pr_debug("set_dma_next_desc_addr() : END\n");
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}
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EXPORT_SYMBOL(set_dma_next_desc_addr);
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void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr)
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{
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pr_debug("set_dma_curr_desc_addr() : BEGIN \n");
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dma_ch[channel].regs->curr_desc_ptr = addr;
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pr_debug("set_dma_curr_desc_addr() : END\n");
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}
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EXPORT_SYMBOL(set_dma_curr_desc_addr);
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void set_dma_x_count(unsigned int channel, unsigned short x_count)
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{
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dma_ch[channel].regs->x_count = x_count;
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}
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EXPORT_SYMBOL(set_dma_x_count);
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void set_dma_y_count(unsigned int channel, unsigned short y_count)
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{
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dma_ch[channel].regs->y_count = y_count;
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}
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EXPORT_SYMBOL(set_dma_y_count);
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void set_dma_x_modify(unsigned int channel, short x_modify)
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{
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dma_ch[channel].regs->x_modify = x_modify;
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}
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EXPORT_SYMBOL(set_dma_x_modify);
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void set_dma_y_modify(unsigned int channel, short y_modify)
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{
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dma_ch[channel].regs->y_modify = y_modify;
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}
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EXPORT_SYMBOL(set_dma_y_modify);
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void set_dma_config(unsigned int channel, unsigned short config)
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{
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dma_ch[channel].regs->cfg = config;
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}
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EXPORT_SYMBOL(set_dma_config);
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unsigned short
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set_bfin_dma_config(char direction, char flow_mode,
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char intr_mode, char dma_mode, char width, char syncmode)
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{
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unsigned short config;
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config =
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((direction << 1) | (width << 2) | (dma_mode << 4) |
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(intr_mode << 6) | (flow_mode << 12) | (syncmode << 5));
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return config;
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}
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EXPORT_SYMBOL(set_bfin_dma_config);
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void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg)
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{
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dma_ch[channel].regs->cfg |= ((nr_sg & 0x0F) << 8);
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dma_ch[channel].regs->next_desc_ptr = (unsigned int)sg;
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}
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EXPORT_SYMBOL(set_dma_sg);
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void set_dma_curr_addr(unsigned int channel, unsigned long addr)
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{
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dma_ch[channel].regs->curr_addr_ptr = addr;
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}
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EXPORT_SYMBOL(set_dma_curr_addr);
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/*------------------------------------------------------------------------------
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* Get the DMA status of a specific DMA channel from the system.
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*-----------------------------------------------------------------------------*/
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unsigned short get_dma_curr_irqstat(unsigned int channel)
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{
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return dma_ch[channel].regs->irq_status;
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}
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EXPORT_SYMBOL(get_dma_curr_irqstat);
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/*------------------------------------------------------------------------------
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* Clear the DMA_DONE bit in DMA status. Stop the DMA completion interrupt.
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*-----------------------------------------------------------------------------*/
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void clear_dma_irqstat(unsigned int channel)
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{
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dma_ch[channel].regs->irq_status |= 3;
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}
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EXPORT_SYMBOL(clear_dma_irqstat);
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/*------------------------------------------------------------------------------
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* Get current DMA xcount of a specific DMA channel from the system.
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*-----------------------------------------------------------------------------*/
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unsigned short get_dma_curr_xcount(unsigned int channel)
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{
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return dma_ch[channel].regs->curr_x_count;
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}
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EXPORT_SYMBOL(get_dma_curr_xcount);
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/*------------------------------------------------------------------------------
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* Get current DMA ycount of a specific DMA channel from the system.
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*-----------------------------------------------------------------------------*/
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unsigned short get_dma_curr_ycount(unsigned int channel)
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{
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return dma_ch[channel].regs->curr_y_count;
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}
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EXPORT_SYMBOL(get_dma_curr_ycount);
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unsigned long get_dma_next_desc_ptr(unsigned int channel)
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{
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return dma_ch[channel].regs->next_desc_ptr;
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}
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EXPORT_SYMBOL(get_dma_next_desc_ptr);
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unsigned long get_dma_curr_desc_ptr(unsigned int channel)
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{
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return dma_ch[channel].regs->curr_desc_ptr;
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}
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EXPORT_SYMBOL(get_dma_curr_desc_ptr);
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unsigned long get_dma_curr_addr(unsigned int channel)
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{
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return dma_ch[channel].regs->curr_addr_ptr;
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}
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EXPORT_SYMBOL(get_dma_curr_addr);
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#ifdef CONFIG_PM
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# ifndef MAX_DMA_SUSPEND_CHANNELS
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# define MAX_DMA_SUSPEND_CHANNELS MAX_DMA_CHANNELS
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