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Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

Browse Source 
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
  ARM/OMAP: Remove the +x bit from a couple of source files
  omap: McBSP: Drop unnecessary status/error bit clearing on reg_cacheretrieved register values
  OMAP4: fix temporary hacks that break multi-omap PM
  OMAP2: cpu_is_omap2*: fix compile-time removal of unused code
  omap3: pandora: add missing i2c3 board_info
  omap: mach-omap2/io.c: fix function declarations
  omap: Fix gpio_resume_after_retention
  omap3: Fix support for the LEDs connected to GPIO outputs on IGEP v2board
  omap: Checkpatch cleanup for blizzard.h
  omap: pass the reboot command to the boot loader
  omap2/3/4: mailbox: remove compiler warning
  OMAP2: serial.c: Fix number of uarts in early_init
  omap: Enable PM_RUNTIME in defconfigs to avoid USB compile errors
  omap2: Update n8x0 defconfig to test multi-omap and DMA api changes
  omap2: add USB initialization for tusb6010
  omap4: Fix build break by moving omap_smc1 into a separate .S
  omap2/3/4: ehci: avoid compiler error with touchbook
  omap3: Fix compile for Touch Book early_param
This commit is contained in:
Linus Torvalds 2010-03-18 16:59:30 -07:00
commit 9b59a0a4ee
42 changed files with 403 additions and 132 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/configs/cm_t35_defconfig
View File

@ -358,7 +358,7 @@ CONFIG_PM_SLEEP=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
# CONFIG_PM_RUNTIME is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

1
arch/arm/configs/n770_defconfig
View File

@ -308,6 +308,7 @@ CONFIG_PM_SLEEP=y
CONFIG_SUSPEND_UP_POSSIBLE=y
CONFIG_SUSPEND=y
# CONFIG_APM_EMULATION is not set
CONFIG_PM_RUNTIME=y
#
# Networking

160
arch/arm/configs/n8x0_defconfig
View File

@ -191,6 +191,7 @@ CONFIG_ARCH_OMAP=y
#
CONFIG_ARCH_OMAP_OTG=y
# CONFIG_ARCH_OMAP1 is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_ARCH_OMAP2=y
# CONFIG_ARCH_OMAP3 is not set
# CONFIG_ARCH_OMAP4 is not set
@ -198,8 +199,6 @@ CONFIG_ARCH_OMAP2=y
#
# OMAP Feature Selections
#
# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
CONFIG_OMAP_RESET_CLOCKS=y
# CONFIG_OMAP_MUX is not set
# CONFIG_OMAP_MCBSP is not set
@ -208,15 +207,13 @@ CONFIG_OMAP_MBOX_FWK=y
CONFIG_OMAP_32K_TIMER=y
CONFIG_OMAP_32K_TIMER_HZ=128
CONFIG_OMAP_DM_TIMER=y
# CONFIG_OMAP_LL_DEBUG_UART1 is not set
# CONFIG_OMAP_LL_DEBUG_UART2 is not set
CONFIG_OMAP_LL_DEBUG_UART3=y
# CONFIG_OMAP_PM_NONE is not set
CONFIG_OMAP_PM_NOOP=y
# CONFIG_MACH_OMAP_GENERIC is not set
#
# OMAP Core Type
#
CONFIG_ARCH_OMAP24XX=y
CONFIG_ARCH_OMAP2420=y
# CONFIG_ARCH_OMAP2430 is not set
@ -227,6 +224,9 @@ CONFIG_MACH_OMAP2_TUSB6010=y
# CONFIG_MACH_OMAP_H4 is not set
# CONFIG_MACH_OMAP_APOLLON is not set
# CONFIG_MACH_OMAP_2430SDP is not set
CONFIG_MACH_NOKIA_N800=y
CONFIG_MACH_NOKIA_N810=y
CONFIG_MACH_NOKIA_N810_WIMAX=y
CONFIG_MACH_NOKIA_N8X0=y
#
@ -303,7 +303,7 @@ CONFIG_ALIGNMENT_TRAP=y
CONFIG_ZBOOT_ROM_TEXT=0x10C08000
CONFIG_ZBOOT_ROM_BSS=0x10200000
# CONFIG_ZBOOT_ROM is not set
CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS2,115200n8"
CONFIG_CMDLINE="root=/dev/mmcblk0p2 console=ttyS2,115200n8 debug earlyprintk rootwait"
# CONFIG_XIP_KERNEL is not set
# CONFIG_KEXEC is not set
@ -337,7 +337,14 @@ CONFIG_HAVE_AOUT=y
#
# Power management options
#
# CONFIG_PM is not set
CONFIG_PM=y
# CONFIG_PM_DEBUG is not set
CONFIG_PM_SLEEP=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
CONFIG_PM_RUNTIME=y
CONFIG_PM_OPS=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y
@ -617,7 +624,55 @@ CONFIG_UNIX98_PTYS=y
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
# CONFIG_I2C_COMPAT is not set
# CONFIG_I2C_CHARDEV is not set
# CONFIG_I2C_HELPER_AUTO is not set
# CONFIG_I2C_SMBUS is not set
#
# I2C Algorithms
#
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_ALGOPCA is not set
#
# I2C Hardware Bus support
#
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_DESIGNWARE is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_OMAP=y
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_XILINX is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_TINY_USB is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_STUB is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
@ -673,15 +728,44 @@ CONFIG_SSB_POSSIBLE=y
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_HTC_EGPIO is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_TPS65010 is not set
CONFIG_MENELAUS=y
# CONFIG_TWL4030_CORE is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_T7L66XB is not set
# CONFIG_MFD_TC6387XB is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_MC13783 is not set
# CONFIG_AB3100_CORE is not set
# CONFIG_EZX_PCAP is not set
# CONFIG_AB4500_CORE is not set
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
# CONFIG_REGULATOR_DUMMY is not set
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_BQ24022 is not set
# CONFIG_REGULATOR_MAX1586 is not set
# CONFIG_REGULATOR_MAX8649 is not set
# CONFIG_REGULATOR_MAX8660 is not set
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
# CONFIG_MEDIA_SUPPORT is not set
#
@ -718,7 +802,10 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_DEVICE_CLASS=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
CONFIG_USB_SUSPEND=y
CONFIG_USB_OTG=y
# CONFIG_USB_OTG_WHITELIST is not set
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
# CONFIG_USB_MON is not set
# CONFIG_USB_WUSB is not set
# CONFIG_USB_WUSB_CBAF is not set
@ -737,9 +824,10 @@ CONFIG_USB_DEVICE_CLASS=y
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_TUSB6010=y
# CONFIG_USB_MUSB_HOST is not set
CONFIG_USB_MUSB_PERIPHERAL=y
# CONFIG_USB_MUSB_OTG is not set
# CONFIG_USB_MUSB_PERIPHERAL is not set
CONFIG_USB_MUSB_OTG=y
CONFIG_USB_GADGET_MUSB_HDRC=y
CONFIG_USB_MUSB_HDRC_HCD=y
# CONFIG_MUSB_PIO_ONLY is not set
# CONFIG_USB_INVENTRA_DMA is not set
# CONFIG_USB_TI_CPPI_DMA is not set
@ -824,44 +912,77 @@ CONFIG_USB_GADGET_DUALSPEED=y
# CONFIG_USB_ZERO is not set
# CONFIG_USB_AUDIO is not set
CONFIG_USB_ETH=y
# CONFIG_USB_ETH_RNDIS is not set
CONFIG_USB_ETH_RNDIS=y
CONFIG_USB_ETH_EEM=y
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_FILE_STORAGE is not set
# CONFIG_USB_MASS_STORAGE is not set
# CONFIG_USB_G_SERIAL is not set
# CONFIG_USB_MIDI_GADGET is not set
# CONFIG_USB_G_PRINTER is not set
# CONFIG_USB_CDC_COMPOSITE is not set
# CONFIG_USB_G_NOKIA is not set
# CONFIG_USB_G_MULTI is not set
#
# OTG and related infrastructure
#
CONFIG_USB_OTG_UTILS=y
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_ISP1301_OMAP is not set
# CONFIG_USB_ULPI is not set
CONFIG_NOP_USB_XCEIV=y
# CONFIG_MMC is not set
CONFIG_MMC=y
# CONFIG_MMC_DEBUG is not set
# CONFIG_MMC_UNSAFE_RESUME is not set
#
# MMC/SD/SDIO Card Drivers
#
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_BOUNCE=y
# CONFIG_SDIO_UART is not set
# CONFIG_MMC_TEST is not set
#
# MMC/SD/SDIO Host Controller Drivers
#
# CONFIG_MMC_SDHCI is not set
CONFIG_MMC_OMAP=y
# CONFIG_MMC_SPI is not set
# CONFIG_MEMSTICK is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_REGULATOR is not set
# CONFIG_UIO is not set
#
# TI VLYNQ
#
# CONFIG_STAGING is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
@ -886,8 +1007,11 @@ CONFIG_INOTIFY_USER=y
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#

1
arch/arm/configs/omap3_beagle_defconfig
View File

@ -324,6 +324,7 @@ CONFIG_PM_SLEEP=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

2
arch/arm/configs/omap3_defconfig
View File

@ -450,7 +450,7 @@ CONFIG_SUSPEND=y
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
# CONFIG_PM_RUNTIME is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

1
arch/arm/configs/omap3_evm_defconfig
View File

@ -340,6 +340,7 @@ CONFIG_PM_SLEEP=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

2
arch/arm/configs/omap3_touchbook_defconfig
View File

@ -368,7 +368,7 @@ CONFIG_SUSPEND=y
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
# CONFIG_PM_RUNTIME is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

1
arch/arm/configs/omap_3430sdp_defconfig
View File

@ -363,6 +363,7 @@ CONFIG_PM_SLEEP=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

2
arch/arm/configs/omap_3630sdp_defconfig
View File

@ -361,7 +361,7 @@ CONFIG_SUSPEND=y
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
# CONFIG_PM_RUNTIME is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

1
arch/arm/configs/omap_h2_1610_defconfig
View File

@ -331,6 +331,7 @@ CONFIG_PM_SLEEP=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
#

1
arch/arm/configs/omap_zoom2_defconfig
View File

@ -343,6 +343,7 @@ CONFIG_SUSPEND=y
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

2
arch/arm/configs/omap_zoom3_defconfig
View File

@ -361,7 +361,7 @@ CONFIG_SUSPEND=y
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
# CONFIG_PM_RUNTIME is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

1
arch/arm/configs/rx51_defconfig
View File

@ -322,6 +322,7 @@ CONFIG_PM_SLEEP=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_APM_EMULATION is not set
CONFIG_PM_RUNTIME=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

3
arch/arm/mach-omap2/Makefile
View File

@ -22,6 +22,9 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
# SMP support ONLY available for OMAP4
obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o
obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o
AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a
# Functions loaded to SRAM
obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o

2
arch/arm/mach-omap2/board-3430sdp.c
View File

@ -648,7 +648,7 @@ static void enable_board_wakeup_source(void)
OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
}
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,

2
arch/arm/mach-omap2/board-3630sdp.c
View File

@ -54,7 +54,7 @@ static void enable_board_wakeup_source(void)
OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
}
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,

26
arch/arm/mach-omap2/board-4430sdp.c
View File

@ -50,33 +50,9 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = {
};
#ifdef CONFIG_CACHE_L2X0
noinline void omap_smc1(u32 fn, u32 arg)
{
register u32 r12 asm("r12") = fn;
register u32 r0 asm("r0") = arg;
/* This is common routine cache secure monitor API used to
* modify the PL310 secure registers.
* r0 contains the value to be modified and "r12" contains
* the monitor API number. It uses few CPU registers
* internally and hence they need be backed up including
* link register "lr".
* Explicitly save r11 and r12 the compiler generated code
* won't save it.
*/
asm volatile(
"stmfd r13!, {r11,r12}\n"
"dsb\n"
"smc\n"
"ldmfd r13!, {r11,r12}\n"
: "+r" (r0), "+r" (r12)
:
: "r4", "r5", "r10", "lr", "cc");
}
EXPORT_SYMBOL(omap_smc1);
static int __init omap_l2_cache_init(void)
{
extern void omap_smc1(u32 fn, u32 arg);
void __iomem *l2cache_base;
/* To avoid code running on other OMAPs in

2
arch/arm/mach-omap2/board-am3517evm.c
View File

@ -273,7 +273,7 @@ static void __init am3517_evm_init_irq(void)
omap_gpio_init();
}
static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,

2
arch/arm/mach-omap2/board-cm-t35.c
View File

@ -612,7 +612,7 @@ static struct omap2_hsmmc_info mmc[] = {
{} /* Terminator */
};
static struct ehci_hcd_omap_platform_data ehci_pdata = {
static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,

2
arch/arm/mach-omap2/board-devkit8000.c
View File

@ -636,7 +636,7 @@ static struct omap_musb_board_data musb_board_data = {
.power = 100,
};
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,

56
arch/arm/mach-omap2/board-igep0020.c
View File

@ -16,7 +16,6 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/leds.h>
#include <linux/interrupt.h>
#include <linux/regulator/machine.h>
@ -39,8 +38,8 @@
#define IGEP2_SMSC911X_CS 5
#define IGEP2_SMSC911X_GPIO 176
#define IGEP2_GPIO_USBH_NRESET 24
#define IGEP2_GPIO_LED0_RED 26
#define IGEP2_GPIO_LED0_GREEN 27
#define IGEP2_GPIO_LED0_GREEN 26
#define IGEP2_GPIO_LED0_RED 27
#define IGEP2_GPIO_LED1_RED 28
#define IGEP2_GPIO_DVI_PUP 170
#define IGEP2_GPIO_WIFI_NPD 94
@ -355,34 +354,50 @@ static void __init igep2_display_init(void)
gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1))
pr_err("IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n");
}
#ifdef CONFIG_LEDS_TRIGGERS
static struct gpio_led gpio_leds[] = {
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
#include <linux/leds.h>
static struct gpio_led igep2_gpio_leds[] = {
{
.name = "GPIO_LED1_RED",
.name = "led0:red",
.gpio = IGEP2_GPIO_LED0_RED,
},
{
.name = "led0:green",
.default_trigger = "heartbeat",
.gpio = IGEP2_GPIO_LED0_GREEN,
},
{
.name = "led1:red",
.gpio = IGEP2_GPIO_LED1_RED,
},
};
static struct gpio_led_platform_data gpio_leds_info = {
.leds = gpio_leds,
.num_leds = ARRAY_SIZE(gpio_leds),
static struct gpio_led_platform_data igep2_led_pdata = {
.leds = igep2_gpio_leds,
.num_leds = ARRAY_SIZE(igep2_gpio_leds),
};
static struct platform_device leds_gpio = {
static struct platform_device igep2_led_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &gpio_leds_info,
.platform_data = &igep2_led_pdata,
},
};
static void __init igep2_init_led(void)
{
platform_device_register(&igep2_led_device);
}
#else
static inline void igep2_init_led(void) {}
#endif
static struct platform_device *igep2_devices[] __initdata = {
&igep2_dss_device,
#ifdef CONFIG_LEDS_TRIGGERS
&leds_gpio,
#endif
};
static void __init igep2_init_irq(void)
@ -442,7 +457,7 @@ static struct omap_musb_board_data musb_board_data = {
.power = 100,
};
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
@ -471,31 +486,34 @@ static void __init igep2_init(void)
usb_ehci_init(&ehci_pdata);
igep2_flash_init();
igep2_init_led();
igep2_display_init();
igep2_init_smsc911x();
/* GPIO userspace leds */
if ((gpio_request(IGEP2_GPIO_LED0_RED, "GPIO_LED0_RED") == 0) &&
#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE)
if ((gpio_request(IGEP2_GPIO_LED0_RED, "led0:red") == 0) &&
(gpio_direction_output(IGEP2_GPIO_LED0_RED, 1) == 0)) {
gpio_export(IGEP2_GPIO_LED0_RED, 0);
gpio_set_value(IGEP2_GPIO_LED0_RED, 0);
} else
pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_RED\n");
if ((gpio_request(IGEP2_GPIO_LED0_GREEN, "GPIO_LED0_GREEN") == 0) &&
if ((gpio_request(IGEP2_GPIO_LED0_GREEN, "led0:green") == 0) &&
(gpio_direction_output(IGEP2_GPIO_LED0_GREEN, 1) == 0)) {
gpio_export(IGEP2_GPIO_LED0_GREEN, 0);
gpio_set_value(IGEP2_GPIO_LED0_GREEN, 0);
} else
pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n");
#ifndef CONFIG_LEDS_TRIGGERS
if ((gpio_request(IGEP2_GPIO_LED1_RED, "GPIO_LED1_RED") == 0) &&
if ((gpio_request(IGEP2_GPIO_LED1_RED, "led1:red") == 0) &&
(gpio_direction_output(IGEP2_GPIO_LED1_RED, 1) == 0)) {
gpio_export(IGEP2_GPIO_LED1_RED, 0);
gpio_set_value(IGEP2_GPIO_LED1_RED, 0);
} else
pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_RED\n");
#endif
/* GPIO W-LAN + Bluetooth combo module */
if ((gpio_request(IGEP2_GPIO_WIFI_NPD, "GPIO_WIFI_NPD") == 0) &&
(gpio_direction_output(IGEP2_GPIO_WIFI_NPD, 1) == 0)) {

98
arch/arm/mach-omap2/board-n8x0.c
View File

@ -37,6 +37,103 @@ static int slot1_cover_open;
static int slot2_cover_open;
static struct device *mmc_device;
#define TUSB6010_ASYNC_CS 1
#define TUSB6010_SYNC_CS 4
#define TUSB6010_GPIO_INT 58
#define TUSB6010_GPIO_ENABLE 0
#define TUSB6010_DMACHAN 0x3f
#if defined(CONFIG_USB_TUSB6010) || \
defined(CONFIG_USB_TUSB6010_MODULE)
/*
* Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
* 1.5 V voltage regulators of PM companion chip. Companion chip will then
* provide then PGOOD signal to TUSB6010 which will release it from reset.
*/
static int tusb_set_power(int state)
{
int i, retval = 0;
if (state) {
gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
msleep(1);
/* Wait until TUSB6010 pulls INT pin down */
i = 100;
while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
msleep(1);
i--;
}
if (!i) {
printk(KERN_ERR "tusb: powerup failed\n");
retval = -ENODEV;
}
} else {
gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
msleep(10);
}
return retval;
}
static struct musb_hdrc_config musb_config = {
.multipoint = 1,
.dyn_fifo = 1,
.num_eps = 16,
.ram_bits = 12,
};
static struct musb_hdrc_platform_data tusb_data = {
#if defined(CONFIG_USB_MUSB_OTG)
.mode = MUSB_OTG,
#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
.mode = MUSB_PERIPHERAL,
#else /* defined(CONFIG_USB_MUSB_HOST) */
.mode = MUSB_HOST,
#endif
.set_power = tusb_set_power,
.min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */
.power = 100, /* Max 100 mA VBUS for host mode */
.config = &musb_config,
};
static void __init n8x0_usb_init(void)
{
int ret = 0;
static char announce[] __initdata = KERN_INFO "TUSB 6010\n";
/* PM companion chip power control pin */
ret = gpio_request(TUSB6010_GPIO_ENABLE, "TUSB6010 enable");
if (ret != 0) {
printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
TUSB6010_GPIO_ENABLE);
return;
}
gpio_direction_output(TUSB6010_GPIO_ENABLE, 0);
tusb_set_power(0);
ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
if (ret != 0)
goto err;
printk(announce);
return;
err:
gpio_free(TUSB6010_GPIO_ENABLE);
}
#else
static void __init n8x0_usb_init(void) {}
#endif /*CONFIG_USB_TUSB6010 */
static struct omap2_mcspi_device_config p54spi_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,
@ -562,6 +659,7 @@ static void __init n8x0_init_machine(void)
n8x0_menelaus_init();
n8x0_onenand_init();
n8x0_mmc_init();
n8x0_usb_init();
}
MACHINE_START(NOKIA_N800, "Nokia N800")

2
arch/arm/mach-omap2/board-omap3beagle.c
View File

@ -410,7 +410,7 @@ static void __init omap3beagle_flash_init(void)
}
}
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,

2
arch/arm/mach-omap2/board-omap3evm.c
View File

@ -635,7 +635,7 @@ static struct platform_device *omap3_evm_devices[] __initdata = {
&omap3_evm_dss_device,
};
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,

12
arch/arm/mach-omap2/board-omap3pandora.c
View File

@ -459,12 +459,20 @@ static struct i2c_board_info __initdata omap3pandora_i2c_boardinfo[] = {
},
};
static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = {
{
I2C_BOARD_INFO("bq27500", 0x55),
.flags = I2C_CLIENT_WAKE,
},
};
static int __init omap3pandora_i2c_init(void)
{
omap_register_i2c_bus(1, 2600, omap3pandora_i2c_boardinfo,
ARRAY_SIZE(omap3pandora_i2c_boardinfo));
/* i2c2 pins are not connected */
omap_register_i2c_bus(3, 100, NULL, 0);
omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo,
ARRAY_SIZE(omap3pandora_i2c3_boardinfo));
return 0;
}
@ -537,7 +545,7 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
&pandora_dss_device,
};
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,

12
arch/arm/mach-omap2/board-omap3touchbook.c
View File

@ -493,7 +493,7 @@ static void __init omap3touchbook_flash_init(void)
}
}
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
@ -518,14 +518,14 @@ static void omap3_touchbook_poweroff(void)
gpio_direction_output(TB_KILL_POWER_GPIO, 0);
}
static void __init early_touchbook_revision(char **p)
static int __init early_touchbook_revision(char *p)
{
if (!*p)
return;
if (!p)
return 0;
strict_strtoul(*p, 10, &touchbook_revision);
return strict_strtoul(p, 10, &touchbook_revision);
}
__early_param("tbr=", early_touchbook_revision);
early_param("tbr", early_touchbook_revision);
static struct omap_musb_board_data musb_board_data = {
.interface_type = MUSB_INTERFACE_ULPI,

2
arch/arm/mach-omap2/board-overo.c
View File

@ -394,7 +394,7 @@ static struct platform_device *overo_devices[] __initdata = {
&overo_lcd_device,
};
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,

2
arch/arm/mach-omap2/board-zoom3.c
View File

@ -52,7 +52,7 @@ static struct omap_board_mux board_mux[] __initdata = {
#define board_mux NULL
#endif
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,

1
arch/arm/mach-omap2/clock2420_data.c
View File

@ -1841,6 +1841,7 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL, "aes_ick", &aes_ick, CK_242X),
CLK(NULL, "pka_ick", &pka_ick, CK_242X),
CLK(NULL, "usb_fck", &usb_fck, CK_242X),
CLK("musb_hdrc", "fck", &osc_ck, CK_242X),
};
/*

21
arch/arm/mach-omap2/io.c
View File

@ -237,7 +237,7 @@ static void __init _omap2_map_common_io(void)
}
#ifdef CONFIG_ARCH_OMAP2420
void __init omap242x_map_common_io()
void __init omap242x_map_common_io(void)
{
iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
@ -246,7 +246,7 @@ void __init omap242x_map_common_io()
#endif
#ifdef CONFIG_ARCH_OMAP2430
void __init omap243x_map_common_io()
void __init omap243x_map_common_io(void)
{
iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
@ -255,7 +255,7 @@ void __init omap243x_map_common_io()
#endif
#ifdef CONFIG_ARCH_OMAP3
void __init omap34xx_map_common_io()
void __init omap34xx_map_common_io(void)
{
iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
_omap2_map_common_io();
@ -263,7 +263,7 @@ void __init omap34xx_map_common_io()
#endif
#ifdef CONFIG_ARCH_OMAP4
void __init omap44xx_map_common_io()
void __init omap44xx_map_common_io(void)
{
iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
_omap2_map_common_io();
@ -309,7 +309,6 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
{
pwrdm_init(powerdomains_omap);
clkdm_init(clockdomains_omap, clkdm_autodeps);
#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
if (cpu_is_omap242x())
omap2420_hwmod_init();
else if (cpu_is_omap243x())
@ -319,7 +318,6 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
omap2_mux_init();
/* The OPP tables have to be registered before a clk init */
omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
#endif
if (cpu_is_omap2420())
omap2420_clk_init();
@ -333,11 +331,12 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
pr_err("Could not init clock framework - unknown CPU\n");
omap_serial_early_init();
#ifndef CONFIG_ARCH_OMAP4
omap_hwmod_late_init();
if (cpu_is_omap24xx() || cpu_is_omap34xx()) /* FIXME: OMAP4 */
omap_hwmod_late_init();
omap_pm_if_init();
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
_omap2_init_reprogram_sdrc();
#endif
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
_omap2_init_reprogram_sdrc();
}
gpmc_init();
}

12
arch/arm/mach-omap2/mailbox.c
View File

@ -430,19 +430,19 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev)
if (unlikely(!res)) {
dev_err(&pdev->dev, "invalid irq resource\n");
ret = -ENODEV;
goto err_iva1;
omap_mbox_unregister(&mbox_dsp_info);
goto err_dsp;
}
mbox_iva_info.irq = res->start;
ret = omap_mbox_register(&pdev->dev, &mbox_iva_info);
if (ret)
goto err_iva1;
if (ret) {
omap_mbox_unregister(&mbox_dsp_info);
goto err_dsp;
}
}
#endif
return 0;
err_iva1:
omap_mbox_unregister(&mbox_dsp_info);
err_dsp:
iounmap(mbox_base);
return ret;

32
arch/arm/mach-omap2/omap44xx-smc.S Normal file
View File

@ -0,0 +1,32 @@
/*
* OMAP44xx secure APIs file.
*
* Copyright (C) 2010 Texas Instruments, Inc.
* Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
*
*
* This program is free software,you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/linkage.h>
/*
* This is common routine to manage secure monitor API
* used to modify the PL310 secure registers.
* 'r0' contains the value to be modified and 'r12' contains
* the monitor API number. It uses few CPU registers
* internally and hence they need be backed up including
* link register "lr".
* Function signature : void omap_smc1(u32 fn, u32 arg)
*/
ENTRY(omap_smc1)
stmfd sp!, {r2-r12, lr}
mov r12, r0
mov r0, r1
dsb
smc
ldmfd sp!, {r2-r12, pc}
END(omap_smc1)

4
arch/arm/mach-omap2/prcm.c
View File

@ -133,7 +133,7 @@ u32 omap_prcm_get_reset_sources(void)
EXPORT_SYMBOL(omap_prcm_get_reset_sources);
/* Resets clock rates and reboots the system. Only called from system.h */
void omap_prcm_arch_reset(char mode)
void omap_prcm_arch_reset(char mode, const char *cmd)
{
s16 prcm_offs = 0;
@ -145,7 +145,7 @@ void omap_prcm_arch_reset(char mode)
u32 l;
prcm_offs = OMAP3430_GR_MOD;
l = ('B' << 24) | ('M' << 16) | mode;
l = ('B' << 24) | ('M' << 16) | (cmd ? (u8)*cmd : 0);
/* Reserve the first word in scratchpad for communicating
* with the boot ROM. A pointer to a data structure
* describing the boot process can be stored there,

15
arch/arm/mach-omap2/serial.c
View File

@ -644,16 +644,21 @@ static void serial_out_override(struct uart_port *up, int offset, int value)
}
void __init omap_serial_early_init(void)
{
int i;
int i, nr_ports;
char name[16];
if (!(cpu_is_omap3630() || cpu_is_omap4430()))
nr_ports = 3;
else
nr_ports = ARRAY_SIZE(omap_uart);
/*
* Make sure the serial ports are muxed on at this point.
* You have to mux them off in device drivers later on
* if not needed.
*/
for (i = 0; i < ARRAY_SIZE(omap_uart); i++) {
for (i = 0; i < nr_ports; i++) {
struct omap_uart_state *uart = &omap_uart[i];
struct platform_device *pdev = &uart->pdev;
struct device *dev = &pdev->dev;
@ -669,17 +674,17 @@ void __init omap_serial_early_init(void)
continue;
}
sprintf(name, "uart%d_ick", i+1);
sprintf(name, "uart%d_ick", i + 1);
uart->ick = clk_get(NULL, name);
if (IS_ERR(uart->ick)) {
printk(KERN_ERR "Could not get uart%d_ick\n", i+1);
printk(KERN_ERR "Could not get uart%d_ick\n", i + 1);
uart->ick = NULL;
}
sprintf(name, "uart%d_fck", i+1);
uart->fck = clk_get(NULL, name);
if (IS_ERR(uart->fck)) {
printk(KERN_ERR "Could not get uart%d_fck\n", i+1);
printk(KERN_ERR "Could not get uart%d_fck\n", i + 1);
uart->fck = NULL;
}

6
arch/arm/mach-omap2/usb-ehci.c
View File

@ -70,7 +70,7 @@ static struct platform_device ehci_device = {
/*
* setup_ehci_io_mux - initialize IO pad mux for USBHOST
*/
static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
{
switch (port_mode[0]) {
case EHCI_HCD_OMAP_MODE_PHY:
@ -213,7 +213,7 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
return;
}
void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
{
platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
@ -229,7 +229,7 @@ void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
#else
void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
{
}

10
arch/arm/plat-omap/gpio.c
View File

@ -2140,18 +2140,18 @@ void omap2_gpio_resume_after_retention(void)
if (gen) {
u32 old0, old1;
if (cpu_is_omap24xx() || cpu_is_omap44xx()) {
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
old0 = __raw_readl(bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
old1 = __raw_readl(bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
__raw_writel(old0 | gen, bank->base +
__raw_writel(old0 | gen, bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
__raw_writel(old1 | gen, bank->base +
__raw_writel(old1 | gen, bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
__raw_writel(old0, bank->base +
__raw_writel(old0, bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
__raw_writel(old1, bank->base +
__raw_writel(old1, bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
}

2
arch/arm/plat-omap/include/plat/blizzard.h
View File

@ -6,7 +6,7 @@ struct blizzard_platform_data {
void (*power_down)(struct device *dev);
unsigned long (*get_clock_rate)(struct device *dev);
unsigned te_connected : 1;
unsigned te_connected:1;
};
#endif

8
arch/arm/plat-omap/include/plat/cpu.h
View File

@ -167,10 +167,14 @@ IS_OMAP_SUBCLASS(443x, 0x443)
#if defined(MULTI_OMAP2)
# if defined(CONFIG_ARCH_OMAP2)
# undef cpu_is_omap24xx
# undef cpu_is_omap242x
# undef cpu_is_omap243x
# define cpu_is_omap24xx() is_omap24xx()
# endif
# if defined (CONFIG_ARCH_OMAP2420)
# undef cpu_is_omap242x
# define cpu_is_omap242x() is_omap242x()
# endif
# if defined (CONFIG_ARCH_OMAP2430)
# undef cpu_is_omap243x
# define cpu_is_omap243x() is_omap243x()
# endif
# if defined(CONFIG_ARCH_OMAP3)

2
arch/arm/plat-omap/include/plat/prcm.h
View File

@ -24,7 +24,7 @@
#define __ASM_ARM_ARCH_OMAP_PRCM_H
u32 omap_prcm_get_reset_sources(void);
void omap_prcm_arch_reset(char mode);
void omap_prcm_arch_reset(char mode, const char *cmd);
int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
const char *name);

6
arch/arm/plat-omap/include/plat/system.h
View File

@ -22,7 +22,7 @@ static inline void arch_idle(void)
cpu_do_idle();
}
static inline void omap1_arch_reset(char mode)
static inline void omap1_arch_reset(char mode, const char *cmd)
{
/*
* Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@ -43,9 +43,9 @@ static inline void omap1_arch_reset(char mode)
static inline void arch_reset(char mode, const char *cmd)
{
if (!cpu_class_is_omap2())
omap1_arch_reset(mode);
omap1_arch_reset(mode, cmd);
else
omap_prcm_arch_reset(mode);
omap_prcm_arch_reset(mode, cmd);
}
#endif

2
arch/arm/plat-omap/include/plat/usb.h
View File

@ -53,7 +53,7 @@ enum musb_interface {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};
extern void usb_musb_init(struct omap_musb_board_data *board_data);
extern void usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata);
extern void usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata);
#endif

12
arch/arm/plat-omap/mcbsp.c
View File

@ -133,8 +133,7 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n",
irqst_spcr2);
/* Writing zero to XSYNC_ERR clears the IRQ */
MCBSP_WRITE(mcbsp_tx, SPCR2,
MCBSP_READ_CACHE(mcbsp_tx, SPCR2) & ~(XSYNC_ERR));
MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
} else {
complete(&mcbsp_tx->tx_irq_completion);
}
@ -154,8 +153,7 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n",
irqst_spcr1);
/* Writing zero to RSYNC_ERR clears the IRQ */
MCBSP_WRITE(mcbsp_rx, SPCR1,
MCBSP_READ_CACHE(mcbsp_rx, SPCR1) & ~(RSYNC_ERR));
MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
} else {
complete(&mcbsp_rx->tx_irq_completion);
}
@ -934,8 +932,7 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
/* if frame sync error - clear the error */
if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) {
/* clear error */
MCBSP_WRITE(mcbsp, SPCR2,
MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XSYNC_ERR));
MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2));
/* resend */
return -1;
} else {
@ -975,8 +972,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
/* if frame sync error - clear the error */
if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) {
/* clear error */
MCBSP_WRITE(mcbsp, SPCR1,
MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RSYNC_ERR));
MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1));
/* resend */
return -1;
} else {