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[PATCH] PCI: disable msi mode in pci_disable_device
Brice said the pci_save_msi_state breaks his driver in his special usage (not in suspend/resume), as pci_save_msi_state will disable msi mode. In his usage, pci_save_state will be called at runtime, and later (after the device operates for some time and has an error) pci_restore_state will be called. In another hand, suspend/resume needs disable msi mode, as device should stop working completely. This patch try to workaround this issue. Drivers are expected call pci_disable_device in suspend time after pci_save_state. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -453,9 +453,11 @@ static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
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/* Set enabled bits to single MSI & enable MSI_enable bit */
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msi_enable(control, 1);
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pci_write_config_word(dev, msi_control_reg(pos), control);
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dev->msi_enabled = 1;
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} else {
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msix_enable(control);
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pci_write_config_word(dev, msi_control_reg(pos), control);
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dev->msix_enabled = 1;
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}
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if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
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/* PCI Express Endpoint device detected */
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@ -472,9 +474,11 @@ void disable_msi_mode(struct pci_dev *dev, int pos, int type)
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/* Set enabled bits to single MSI & enable MSI_enable bit */
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msi_disable(control);
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pci_write_config_word(dev, msi_control_reg(pos), control);
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dev->msi_enabled = 0;
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} else {
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msix_disable(control);
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pci_write_config_word(dev, msi_control_reg(pos), control);
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dev->msix_enabled = 0;
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}
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if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
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/* PCI Express Endpoint device detected */
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@ -549,7 +553,6 @@ int pci_save_msi_state(struct pci_dev *dev)
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pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
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if (control & PCI_MSI_FLAGS_MASKBIT)
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pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
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disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
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save_state->cap_nr = PCI_CAP_ID_MSI;
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pci_add_saved_cap(dev, save_state);
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return 0;
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@ -639,7 +642,6 @@ int pci_save_msix_state(struct pci_dev *dev)
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}
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dev->irq = temp;
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disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
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save_state->cap_nr = PCI_CAP_ID_MSIX;
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pci_add_saved_cap(dev, save_state);
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return 0;
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@ -551,7 +551,14 @@ void
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pci_disable_device(struct pci_dev *dev)
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{
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u16 pci_command;
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if (dev->msi_enabled)
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disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
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PCI_CAP_ID_MSI);
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if (dev->msix_enabled)
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disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
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PCI_CAP_ID_MSIX);
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pci_read_config_word(dev, PCI_COMMAND, &pci_command);
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if (pci_command & PCI_COMMAND_MASTER) {
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pci_command &= ~PCI_COMMAND_MASTER;
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@ -163,6 +163,8 @@ struct pci_dev {
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unsigned int no_msi:1; /* device may not use msi */
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unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
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unsigned int broken_parity_status:1; /* Device generates false positive parity */
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unsigned int msi_enabled:1;
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unsigned int msix_enabled:1;
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u32 saved_config_space[16]; /* config space saved at suspend time */
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struct hlist_head saved_cap_space;
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