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i40e: Drop redundant Rx descriptor processing code
This patch cleans up several pieces of redundant code in the Rx clean-up paths. The first bit is that hdr_addr and the status_err_len portions of the Rx descriptor represent the same value. As such there is no point in setting them to 0 before setting them to 0. I'm dropping the second spot where we are updating the value to 0 so that we only have 1 write for this value instead of 2. The second piece is the checking for the DD bit in the packet. We only need to check for a non-zero value for the status_err_len because if the device is done with the descriptor it will have written something back and the DD is just one piece of it. In addition I have moved the reading of the Rx descriptor bits related to rx_ptype down so that they are actually below the dma_rmb() call so that we are guaranteed that we don't have any funky 64b on 32b calls causing any ordering issues. Change-ID: I256e44a025d3c64a7224aaaec37c852bfcb1871b Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -1220,7 +1220,6 @@ bool i40e_alloc_rx_buffers(struct i40e_ring *rx_ring, u16 cleaned_count)
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* because each write-back erases this info.
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*/
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rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
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rx_desc->read.hdr_addr = 0;
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rx_desc++;
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bi++;
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@ -1741,7 +1740,6 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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while (likely(total_rx_packets < budget)) {
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union i40e_rx_desc *rx_desc;
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struct sk_buff *skb;
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u32 rx_status;
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u16 vlan_tag;
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u8 rx_ptype;
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u64 qword;
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@ -1755,21 +1753,13 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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rx_desc = I40E_RX_DESC(rx_ring, rx_ring->next_to_clean);
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qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);
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rx_ptype = (qword & I40E_RXD_QW1_PTYPE_MASK) >>
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I40E_RXD_QW1_PTYPE_SHIFT;
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rx_status = (qword & I40E_RXD_QW1_STATUS_MASK) >>
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I40E_RXD_QW1_STATUS_SHIFT;
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if (!(rx_status & BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))
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break;
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/* status_error_len will always be zero for unused descriptors
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* because it's cleared in cleanup, and overlaps with hdr_addr
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* which is always zero because packet split isn't used, if the
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* hardware wrote DD then it will be non-zero
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*/
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if (!rx_desc->wb.qword1.status_error_len)
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if (!i40e_test_staterr(rx_desc,
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BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))
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break;
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/* This memory barrier is needed to keep us from reading
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@ -1803,6 +1793,10 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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/* probably a little skewed due to removing CRC */
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total_rx_bytes += skb->len;
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qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);
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rx_ptype = (qword & I40E_RXD_QW1_PTYPE_MASK) >>
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I40E_RXD_QW1_PTYPE_SHIFT;
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/* populate checksum, VLAN, and protocol */
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i40e_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
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@ -705,7 +705,6 @@ bool i40evf_alloc_rx_buffers(struct i40e_ring *rx_ring, u16 cleaned_count)
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* because each write-back erases this info.
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*/
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rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
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rx_desc->read.hdr_addr = 0;
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rx_desc++;
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bi++;
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@ -1209,7 +1208,6 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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while (likely(total_rx_packets < budget)) {
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union i40e_rx_desc *rx_desc;
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struct sk_buff *skb;
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u32 rx_status;
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u16 vlan_tag;
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u8 rx_ptype;
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u64 qword;
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@ -1223,21 +1221,13 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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rx_desc = I40E_RX_DESC(rx_ring, rx_ring->next_to_clean);
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qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);
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rx_ptype = (qword & I40E_RXD_QW1_PTYPE_MASK) >>
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I40E_RXD_QW1_PTYPE_SHIFT;
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rx_status = (qword & I40E_RXD_QW1_STATUS_MASK) >>
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I40E_RXD_QW1_STATUS_SHIFT;
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if (!(rx_status & BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))
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break;
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/* status_error_len will always be zero for unused descriptors
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* because it's cleared in cleanup, and overlaps with hdr_addr
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* which is always zero because packet split isn't used, if the
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* hardware wrote DD then it will be non-zero
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*/
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if (!rx_desc->wb.qword1.status_error_len)
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if (!i40e_test_staterr(rx_desc,
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BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))
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break;
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/* This memory barrier is needed to keep us from reading
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@ -1271,6 +1261,10 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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/* probably a little skewed due to removing CRC */
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total_rx_bytes += skb->len;
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qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);
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rx_ptype = (qword & I40E_RXD_QW1_PTYPE_MASK) >>
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I40E_RXD_QW1_PTYPE_SHIFT;
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/* populate checksum, VLAN, and protocol */
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i40evf_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
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