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powerpc/powernv/npu: Add a debugfs setting to change ATSD threshold

The threshold at which it becomes more efficient to coalesce a range
of ATSDs into a single per-PID ATSD is currently not well understood
due to a lack of real-world work loads. This patch adds a debugfs
parameter allowing the threshold to be altered at runtime in order to
aid future development and refinement of the value.

Signed-off-by: Alistair Popple <alistair@popple.id.au>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Alistair Popple 2018-04-17 19:11:29 +10:00 committed by Michael Ellerman
parent d69ccc00c4
commit 99c3ce33a0

View File

@ -17,7 +17,9 @@
#include <linux/pci.h>
#include <linux/memblock.h>
#include <linux/iommu.h>
#include <linux/debugfs.h>
#include <asm/debugfs.h>
#include <asm/tlb.h>
#include <asm/powernv.h>
#include <asm/reg.h>
@ -44,7 +46,8 @@ static DEFINE_SPINLOCK(npu_context_lock);
* entire TLB on the GPU for the given PID rather than each specific address in
* the range.
*/
#define ATSD_THRESHOLD (2*1024*1024)
static uint64_t atsd_threshold = 2 * 1024 * 1024;
static struct dentry *atsd_threshold_dentry;
/*
* Other types of TCE cache invalidation are not functional in the
@ -683,7 +686,7 @@ static void pnv_npu2_mn_invalidate_range(struct mmu_notifier *mn,
struct npu_context *npu_context = mn_to_npu_context(mn);
unsigned long address;
if (end - start > ATSD_THRESHOLD) {
if (end - start > atsd_threshold) {
/*
* Just invalidate the entire PID if the address range is too
* large.
@ -958,6 +961,11 @@ int pnv_npu2_init(struct pnv_phb *phb)
static int npu_index;
uint64_t rc = 0;
if (!atsd_threshold_dentry) {
atsd_threshold_dentry = debugfs_create_x64("atsd_threshold",
0600, powerpc_debugfs_root, &atsd_threshold);
}
phb->npu.nmmu_flush =
of_property_read_bool(phb->hose->dn, "ibm,nmmu-flush");
for_each_child_of_node(phb->hose->dn, dn) {