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powerpc/powernv/npu: Add a debugfs setting to change ATSD threshold
The threshold at which it becomes more efficient to coalesce a range of ATSDs into a single per-PID ATSD is currently not well understood due to a lack of real-world work loads. This patch adds a debugfs parameter allowing the threshold to be altered at runtime in order to aid future development and refinement of the value. Signed-off-by: Alistair Popple <alistair@popple.id.au> Acked-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -17,7 +17,9 @@
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#include <linux/pci.h>
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#include <linux/memblock.h>
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#include <linux/iommu.h>
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#include <linux/debugfs.h>
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#include <asm/debugfs.h>
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#include <asm/tlb.h>
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#include <asm/powernv.h>
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#include <asm/reg.h>
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@ -44,7 +46,8 @@ static DEFINE_SPINLOCK(npu_context_lock);
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* entire TLB on the GPU for the given PID rather than each specific address in
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* the range.
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*/
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#define ATSD_THRESHOLD (2*1024*1024)
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static uint64_t atsd_threshold = 2 * 1024 * 1024;
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static struct dentry *atsd_threshold_dentry;
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/*
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* Other types of TCE cache invalidation are not functional in the
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@ -683,7 +686,7 @@ static void pnv_npu2_mn_invalidate_range(struct mmu_notifier *mn,
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struct npu_context *npu_context = mn_to_npu_context(mn);
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unsigned long address;
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if (end - start > ATSD_THRESHOLD) {
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if (end - start > atsd_threshold) {
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/*
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* Just invalidate the entire PID if the address range is too
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* large.
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@ -958,6 +961,11 @@ int pnv_npu2_init(struct pnv_phb *phb)
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static int npu_index;
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uint64_t rc = 0;
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if (!atsd_threshold_dentry) {
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atsd_threshold_dentry = debugfs_create_x64("atsd_threshold",
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0600, powerpc_debugfs_root, &atsd_threshold);
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}
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phb->npu.nmmu_flush =
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of_property_read_bool(phb->hose->dn, "ibm,nmmu-flush");
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for_each_child_of_node(phb->hose->dn, dn) {
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