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drm/radeon: fix ring free alignment calculations
fd.o bz#21849 We were aligning to +16 dwords, instead of to the next 16dword boundary in the ring. Fix the calculation to go to the next 16dword boundary when space checking. Signed-off-by: Dave Airlie <airlied@redhat.com>
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drivers/gpu/drm/radeon
@ -2185,9 +2185,9 @@ void radeon_commit_ring(drm_radeon_private_t *dev_priv)
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/* check if the ring is padded out to 16-dword alignment */
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tail_aligned = dev_priv->ring.tail & 0xf;
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tail_aligned = dev_priv->ring.tail & (RADEON_RING_ALIGN-1);
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if (tail_aligned) {
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int num_p2 = 16 - tail_aligned;
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int num_p2 = RADEON_RING_ALIGN - tail_aligned;
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ring = dev_priv->ring.start;
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/* pad with some CP_PACKET2 */
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@ -1964,11 +1964,14 @@ do { \
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#define RING_LOCALS int write, _nr, _align_nr; unsigned int mask; u32 *ring;
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#define RADEON_RING_ALIGN 16
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#define BEGIN_RING( n ) do { \
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if ( RADEON_VERBOSE ) { \
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DRM_INFO( "BEGIN_RING( %d )\n", (n)); \
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} \
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_align_nr = (n + 0xf) & ~0xf; \
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_align_nr = RADEON_RING_ALIGN - ((dev_priv->ring.tail + n) & (RADEON_RING_ALIGN-1)); \
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_align_nr += n; \
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if (dev_priv->ring.space <= (_align_nr * sizeof(u32))) { \
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COMMIT_RING(); \
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radeon_wait_ring( dev_priv, _align_nr * sizeof(u32)); \
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