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irqchip: omap-intc: enable IP protection
When PROTECTION bit in enabled in PROTECTION register, INTC's registers are only accessible from privileged mode. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -51,6 +51,8 @@
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#define INTCPS_NR_ILR_REGS 128
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#define INTCPS_NR_MIR_REGS 3
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#define INTC_PROTECTION_ENABLE (1 << 0)
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/*
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* OMAP2 has a number of different interrupt controllers, each interrupt
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* controller is identified as its own "bank". Register definitions are
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@ -290,12 +292,28 @@ static int __init omap_init_irq_legacy(u32 base)
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return 0;
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}
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static void __init omap_irq_enable_protection(void)
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{
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u32 reg;
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reg = intc_readl(INTC_PROTECTION);
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reg |= INTC_PROTECTION_ENABLE;
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intc_writel(INTC_PROTECTION, reg);
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}
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static int __init omap_init_irq(u32 base, struct device_node *node)
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{
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int ret;
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if (node)
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return omap_init_irq_of(node);
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ret = omap_init_irq_of(node);
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else
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return omap_init_irq_legacy(base);
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ret = omap_init_irq_legacy(base);
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if (ret == 0)
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omap_irq_enable_protection();
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return ret;
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}
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static asmlinkage void __exception_irq_entry
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