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iop: enable generic time
This updates the IOP platform to use the kernel's generic time framework. With clockevent support in place, this reduces to selecting GENERIC_TIME and removing the platform's private timer ->offset() operation (iop_gettimeoffset). Tested on n2100, compile-tested for all plat-iop machines. Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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@ -811,6 +811,7 @@ config ARCH_ACORN
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config PLAT_IOP
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bool
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select GENERIC_CLOCKEVENTS
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select GENERIC_TIME
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config PLAT_ORION
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bool
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@ -234,7 +234,6 @@ extern int iop3xx_get_init_atu(void);
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void iop3xx_map_io(void);
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void iop_init_cp6_handler(void);
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void iop_init_time(unsigned long tickrate);
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unsigned long iop_gettimeoffset(void);
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static inline u32 read_tmr0(void)
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{
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@ -20,7 +20,6 @@
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#define IOP13XX_CORE_FREQ_1200 (5 << 16)
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void iop_init_time(unsigned long tickrate);
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unsigned long iop_gettimeoffset(void);
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static inline unsigned long iop13xx_core_freq(void)
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{
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@ -87,7 +87,6 @@ static void __init iq81340mc_timer_init(void)
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static struct sys_timer iq81340mc_timer = {
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.init = iq81340mc_timer_init,
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.offset = iop_gettimeoffset,
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};
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MACHINE_START(IQ81340MC, "Intel IQ81340MC")
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@ -89,7 +89,6 @@ static void __init iq81340sc_timer_init(void)
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static struct sys_timer iq81340sc_timer = {
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.init = iq81340sc_timer_init,
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.offset = iop_gettimeoffset,
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};
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MACHINE_START(IQ81340SC, "Intel IQ81340SC")
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@ -42,7 +42,6 @@ static void __init em7210_timer_init(void)
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static struct sys_timer em7210_timer = {
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.init = em7210_timer_init,
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.offset = iop_gettimeoffset,
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};
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/*
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@ -47,7 +47,6 @@ static void __init glantank_timer_init(void)
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static struct sys_timer glantank_timer = {
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.init = glantank_timer_init,
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.offset = iop_gettimeoffset,
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};
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@ -78,7 +78,6 @@ static void __init iq31244_timer_init(void)
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static struct sys_timer iq31244_timer = {
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.init = iq31244_timer_init,
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.offset = iop_gettimeoffset,
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};
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@ -46,7 +46,6 @@ static void __init iq80321_timer_init(void)
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static struct sys_timer iq80321_timer = {
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.init = iq80321_timer_init,
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.offset = iop_gettimeoffset,
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};
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@ -53,7 +53,6 @@ static void __init n2100_timer_init(void)
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static struct sys_timer n2100_timer = {
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.init = n2100_timer_init,
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.offset = iop_gettimeoffset,
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};
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@ -48,7 +48,6 @@ static void __init iq80331_timer_init(void)
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static struct sys_timer iq80331_timer = {
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.init = iq80331_timer_init,
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.offset = iop_gettimeoffset,
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};
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@ -48,7 +48,6 @@ static void __init iq80332_timer_init(void)
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static struct sys_timer iq80332_timer = {
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.init = iq80332_timer_init,
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.offset = iop_gettimeoffset,
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};
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@ -140,33 +140,6 @@ static void __init iop_clockevent_set_hz(struct clock_event_device *ce, unsigned
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ce->name, ce->shift, ce->mult);
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}
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static unsigned long ticks_per_usec;
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static unsigned long next_jiffy_time;
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unsigned long iop_gettimeoffset(void)
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{
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unsigned long offset, temp;
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/* enable cp6, if necessary, to avoid taking the overhead of an
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* undefined instruction trap
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*/
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asm volatile (
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"mrc p15, 0, %0, c15, c1, 0\n\t"
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"tst %0, #(1 << 6)\n\t"
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"orreq %0, %0, #(1 << 6)\n\t"
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"mcreq p15, 0, %0, c15, c1, 0\n\t"
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#ifdef CONFIG_CPU_XSCALE
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"mrceq p15, 0, %0, c15, c1, 0\n\t"
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"moveq %0, %0\n\t"
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"subeq pc, pc, #4\n\t"
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#endif
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: "=r"(temp) : : "cc");
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offset = next_jiffy_time - read_tcr1();
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return offset / ticks_per_usec;
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}
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static irqreturn_t
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iop_timer_interrupt(int irq, void *dev_id)
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{
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@ -196,8 +169,6 @@ void __init iop_init_time(unsigned long tick_rate)
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u32 timer_ctl;
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ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
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ticks_per_usec = tick_rate / 1000000;
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next_jiffy_time = 0xffffffff;
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iop_tick_rate = tick_rate;
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timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED |
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