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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-11-19 16:14:13 +08:00

iop: enable generic time

This updates the IOP platform to use the kernel's generic time
framework. With clockevent support in place, this reduces to
selecting GENERIC_TIME and removing the platform's private timer
->offset() operation (iop_gettimeoffset).

Tested on n2100, compile-tested for all plat-iop machines.

Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Mikael Pettersson 2009-10-29 11:46:55 -07:00 committed by Dan Williams
parent 469d30448d
commit 980f2296b5
13 changed files with 1 additions and 40 deletions

View File

@ -811,6 +811,7 @@ config ARCH_ACORN
config PLAT_IOP
bool
select GENERIC_CLOCKEVENTS
select GENERIC_TIME
config PLAT_ORION
bool

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@ -234,7 +234,6 @@ extern int iop3xx_get_init_atu(void);
void iop3xx_map_io(void);
void iop_init_cp6_handler(void);
void iop_init_time(unsigned long tickrate);
unsigned long iop_gettimeoffset(void);
static inline u32 read_tmr0(void)
{

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@ -20,7 +20,6 @@
#define IOP13XX_CORE_FREQ_1200 (5 << 16)
void iop_init_time(unsigned long tickrate);
unsigned long iop_gettimeoffset(void);
static inline unsigned long iop13xx_core_freq(void)
{

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@ -87,7 +87,6 @@ static void __init iq81340mc_timer_init(void)
static struct sys_timer iq81340mc_timer = {
.init = iq81340mc_timer_init,
.offset = iop_gettimeoffset,
};
MACHINE_START(IQ81340MC, "Intel IQ81340MC")

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@ -89,7 +89,6 @@ static void __init iq81340sc_timer_init(void)
static struct sys_timer iq81340sc_timer = {
.init = iq81340sc_timer_init,
.offset = iop_gettimeoffset,
};
MACHINE_START(IQ81340SC, "Intel IQ81340SC")

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@ -42,7 +42,6 @@ static void __init em7210_timer_init(void)
static struct sys_timer em7210_timer = {
.init = em7210_timer_init,
.offset = iop_gettimeoffset,
};
/*

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@ -47,7 +47,6 @@ static void __init glantank_timer_init(void)
static struct sys_timer glantank_timer = {
.init = glantank_timer_init,
.offset = iop_gettimeoffset,
};

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@ -78,7 +78,6 @@ static void __init iq31244_timer_init(void)
static struct sys_timer iq31244_timer = {
.init = iq31244_timer_init,
.offset = iop_gettimeoffset,
};

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@ -46,7 +46,6 @@ static void __init iq80321_timer_init(void)
static struct sys_timer iq80321_timer = {
.init = iq80321_timer_init,
.offset = iop_gettimeoffset,
};

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@ -53,7 +53,6 @@ static void __init n2100_timer_init(void)
static struct sys_timer n2100_timer = {
.init = n2100_timer_init,
.offset = iop_gettimeoffset,
};

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@ -48,7 +48,6 @@ static void __init iq80331_timer_init(void)
static struct sys_timer iq80331_timer = {
.init = iq80331_timer_init,
.offset = iop_gettimeoffset,
};

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@ -48,7 +48,6 @@ static void __init iq80332_timer_init(void)
static struct sys_timer iq80332_timer = {
.init = iq80332_timer_init,
.offset = iop_gettimeoffset,
};

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@ -140,33 +140,6 @@ static void __init iop_clockevent_set_hz(struct clock_event_device *ce, unsigned
ce->name, ce->shift, ce->mult);
}
static unsigned long ticks_per_usec;
static unsigned long next_jiffy_time;
unsigned long iop_gettimeoffset(void)
{
unsigned long offset, temp;
/* enable cp6, if necessary, to avoid taking the overhead of an
* undefined instruction trap
*/
asm volatile (
"mrc p15, 0, %0, c15, c1, 0\n\t"
"tst %0, #(1 << 6)\n\t"
"orreq %0, %0, #(1 << 6)\n\t"
"mcreq p15, 0, %0, c15, c1, 0\n\t"
#ifdef CONFIG_CPU_XSCALE
"mrceq p15, 0, %0, c15, c1, 0\n\t"
"moveq %0, %0\n\t"
"subeq pc, pc, #4\n\t"
#endif
: "=r"(temp) : : "cc");
offset = next_jiffy_time - read_tcr1();
return offset / ticks_per_usec;
}
static irqreturn_t
iop_timer_interrupt(int irq, void *dev_id)
{
@ -196,8 +169,6 @@ void __init iop_init_time(unsigned long tick_rate)
u32 timer_ctl;
ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
ticks_per_usec = tick_rate / 1000000;
next_jiffy_time = 0xffffffff;
iop_tick_rate = tick_rate;
timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED |