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One 32kHz clock fix for the beelink gs1, a CD polarity fix for the SoPine, some
MAINTAINERS maintainance, and a clk / reset switch to our headers. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYG2bAQAKCRDj7w1vZxhR xW/cAQDpP3oAyk00M6ZMKIMefm/DQI3qbf9cA0P9JsPa1inNbAEA0WlHJt2zdGRT ISRW7PI1TyHxMcVteyiw7gE5BvU7kAQ= =Jgu5 -----END PGP SIGNATURE----- Merge tag 'sunxi-fixes-for-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes One 32kHz clock fix for the beelink gs1, a CD polarity fix for the SoPine, some MAINTAINERS maintainance, and a clk / reset switch to our headers. * tag 'sunxi-fixes-for-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: h6: beelink-gs1: Remove ext. 32 kHz osc reference MAINTAINERS: Match on allwinner keyword MAINTAINERS: Add our new mailing-list arm64: dts: allwinner: Fix SD card CD GPIO for SOPine systems arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices Link: https://lore.kernel.org/r/9972a85e-60b7-49f4-a246-db3396dd4764.lettre@localhost Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
974be36e1c
@ -1576,11 +1576,13 @@ R: Jernej Skrabec <jernej.skrabec@siol.net>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
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L: linux-sunxi@lists.linux.dev
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F: arch/arm/mach-sunxi/
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F: arch/arm64/boot/dts/allwinner/
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F: drivers/clk/sunxi-ng/
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F: drivers/pinctrl/sunxi/
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F: drivers/soc/sunxi/
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N: allwinner
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N: sun[x456789]i
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N: sun50i
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@ -19,3 +19,7 @@
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};
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};
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};
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&mmc0 {
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 push-push switch */
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};
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@ -34,7 +34,7 @@
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vmmc-supply = <®_dcdc1>;
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disable-wp;
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bus-width = <4>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 push-pull switch */
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status = "okay";
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};
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@ -289,10 +289,6 @@
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vcc-pm-supply = <®_aldo1>;
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};
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&rtc {
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clocks = <&ext_osc32k>;
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};
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&spdif {
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status = "okay";
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};
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@ -995,9 +995,9 @@
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compatible = "allwinner,sun8i-a23-rsb";
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reg = <0x07083000 0x400>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&r_ccu 13>;
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clocks = <&r_ccu CLK_R_APB2_RSB>;
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clock-frequency = <3000000>;
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resets = <&r_ccu 7>;
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resets = <&r_ccu RST_R_APB2_RSB>;
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pinctrl-names = "default";
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pinctrl-0 = <&r_rsb_pins>;
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status = "disabled";
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