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x86: dtb: Add support for PCI devices backed by dtb nodes
x86_of_pci_init() does two things: - it provides a generic irq enable and disable function. enable queries the device tree for the interrupt information, calls ->xlate on the irq host and updates the pci->irq information for the device. - it walks through PCI bus(es) in the device tree and adds its children (device) nodes to appropriate pci_dev nodes in kernel. So the dtb node information is available at probe time of the PCI device. Adding a PCI bus based on the information in the device tree is currently not supported. Right now direct access via ioports is used. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Tested-by: Dirk Brandewie <dirk.brandewie@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: sodaville@linutronix.de Cc: devicetree-discuss@lists.ozlabs.org LKML-Reference: <1298405266-1624-8-git-send-email-bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -16,6 +16,7 @@
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#include <linux/of.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <asm/irq.h>
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#include <asm/atomic.h>
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@ -29,8 +30,21 @@ extern void add_dtb(u64 data);
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void x86_dtb_find_config(void);
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void x86_dtb_get_config(unsigned int unused);
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void add_interrupt_host(struct irq_domain *ih);
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void __cpuinit x86_of_pci_init(void);
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static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
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{
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return pdev ? pdev->dev.of_node : NULL;
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}
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static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
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{
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return pci_device_to_OF_node(bus->self);
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}
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#else
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static inline void add_dtb(u64 data) { }
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static inline void x86_of_pci_init(void) { }
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#define x86_dtb_find_config x86_init_noop
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#define x86_dtb_get_config x86_init_uint_noop
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#define of_ioapic 0
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@ -9,11 +9,15 @@
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#include <linux/of_fdt.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/of_irq.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/of_pci.h>
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#include <asm/hpet.h>
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#include <asm/irq_controller.h>
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#include <asm/apic.h>
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#include <asm/pci_x86.h>
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__initdata u64 initial_dtb;
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char __initdata cmd_line[COMMAND_LINE_SIZE];
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@ -99,6 +103,85 @@ void __init add_dtb(u64 data)
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initial_dtb = data + offsetof(struct setup_data, data);
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}
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#ifdef CONFIG_PCI
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static int x86_of_pci_irq_enable(struct pci_dev *dev)
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{
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struct of_irq oirq;
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u32 virq;
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int ret;
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u8 pin;
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ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
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if (ret)
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return ret;
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if (!pin)
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return 0;
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ret = of_irq_map_pci(dev, &oirq);
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if (ret)
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return ret;
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virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
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oirq.size);
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if (virq == 0)
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return -EINVAL;
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dev->irq = virq;
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return 0;
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}
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static void x86_of_pci_irq_disable(struct pci_dev *dev)
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{
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}
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void __cpuinit x86_of_pci_init(void)
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{
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struct device_node *np;
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pcibios_enable_irq = x86_of_pci_irq_enable;
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pcibios_disable_irq = x86_of_pci_irq_disable;
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for_each_node_by_type(np, "pci") {
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const void *prop;
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struct pci_bus *bus;
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unsigned int bus_min;
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struct device_node *child;
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prop = of_get_property(np, "bus-range", NULL);
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if (!prop)
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continue;
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bus_min = be32_to_cpup(prop);
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bus = pci_find_bus(0, bus_min);
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if (!bus) {
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printk(KERN_ERR "Can't find a node for bus %s.\n",
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np->full_name);
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continue;
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}
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if (bus->self)
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bus->self->dev.of_node = np;
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else
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bus->dev.of_node = np;
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for_each_child_of_node(np, child) {
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struct pci_dev *dev;
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u32 devfn;
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prop = of_get_property(child, "reg", NULL);
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if (!prop)
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continue;
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devfn = (be32_to_cpup(prop) >> 8) & 0xff;
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dev = pci_get_slot(bus, devfn);
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if (!dev)
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continue;
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dev->dev.of_node = child;
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pci_dev_put(dev);
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}
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}
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}
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#endif
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static void __init dtb_setup_hpet(void)
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{
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struct device_node *dn;
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@ -71,7 +71,7 @@ config OF_MDIO
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config OF_PCI
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def_tristate PCI
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depends on PCI && (PPC || MICROBLAZE)
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depends on PCI && (PPC || MICROBLAZE || X86)
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help
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OpenFirmware PCI bus accessors
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@ -1,5 +1,6 @@
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#include <linux/kernel.h>
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#include <linux/of_pci.h>
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#include <linux/of_irq.h>
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#include <asm/prom.h>
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/**
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