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mfd: pm8xxx: add support to pm8821
This patch adds support to PM8821 PMIC and interrupt support. PM8821 is companion device that supplements primary PMIC PM8921 IC. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Srinivas Kandagatla
Lee Jones
parent
85a9419a25
commit
953f432b3d
@ -10,6 +10,7 @@ voltages and other various functionality to Qualcomm SoCs.
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Value type: <string>
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Definition: must be one of:
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"qcom,pm8058"
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"qcom,pm8821"
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"qcom,pm8921"
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- #address-cells:
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@ -39,6 +39,20 @@
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#define SSBI_REG_ADDR_IRQ_CONFIG (SSBI_REG_ADDR_IRQ_BASE + 7)
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#define SSBI_REG_ADDR_IRQ_RT_STATUS (SSBI_REG_ADDR_IRQ_BASE + 8)
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#define PM8821_SSBI_REG_ADDR_IRQ_BASE 0x100
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#define PM8821_SSBI_REG_ADDR_IRQ_MASTER0 (PM8821_SSBI_REG_ADDR_IRQ_BASE + 0x30)
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#define PM8821_SSBI_REG_ADDR_IRQ_MASTER1 (PM8821_SSBI_REG_ADDR_IRQ_BASE + 0xb0)
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#define PM8821_SSBI_REG(m, b, offset) \
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((m == 0) ? \
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(PM8821_SSBI_REG_ADDR_IRQ_MASTER0 + b + offset) : \
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(PM8821_SSBI_REG_ADDR_IRQ_MASTER1 + b + offset))
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#define PM8821_SSBI_ADDR_IRQ_ROOT(m, b) PM8821_SSBI_REG(m, b, 0x0)
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#define PM8821_SSBI_ADDR_IRQ_CLEAR(m, b) PM8821_SSBI_REG(m, b, 0x01)
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#define PM8821_SSBI_ADDR_IRQ_MASK(m, b) PM8821_SSBI_REG(m, b, 0x08)
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#define PM8821_SSBI_ADDR_IRQ_RT_STATUS(m, b) PM8821_SSBI_REG(m, b, 0x0f)
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#define PM8821_BLOCKS_PER_MASTER 7
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#define PM_IRQF_LVL_SEL 0x01 /* level select */
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#define PM_IRQF_MASK_FE 0x02 /* mask falling edge */
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#define PM_IRQF_MASK_RE 0x04 /* mask rising edge */
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@ -54,6 +68,7 @@
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#define REG_HWREV_2 0x0E8 /* PMIC4 revision 2 */
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#define PM8XXX_NR_IRQS 256
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#define PM8821_NR_IRQS 112
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struct pm_irq_chip {
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struct regmap *regmap;
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@ -65,6 +80,12 @@ struct pm_irq_chip {
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u8 config[0];
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};
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struct pm_irq_data {
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int num_irqs;
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const struct irq_domain_ops *irq_domain_ops;
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void (*irq_handler)(struct irq_desc *desc);
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};
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static int pm8xxx_read_block_irq(struct pm_irq_chip *chip, unsigned int bp,
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unsigned int *ip)
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{
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@ -182,6 +203,78 @@ static void pm8xxx_irq_handler(struct irq_desc *desc)
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chained_irq_exit(irq_chip, desc);
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}
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static void pm8821_irq_block_handler(struct pm_irq_chip *chip,
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int master, int block)
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{
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int pmirq, irq, i, ret;
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unsigned int bits;
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ret = regmap_read(chip->regmap,
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PM8821_SSBI_ADDR_IRQ_ROOT(master, block), &bits);
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if (ret) {
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pr_err("Reading block %d failed ret=%d", block, ret);
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return;
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}
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/* Convert block offset to global block number */
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block += (master * PM8821_BLOCKS_PER_MASTER) - 1;
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/* Check IRQ bits */
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for (i = 0; i < 8; i++) {
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if (bits & BIT(i)) {
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pmirq = block * 8 + i;
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irq = irq_find_mapping(chip->irqdomain, pmirq);
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generic_handle_irq(irq);
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}
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}
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}
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static inline void pm8821_irq_master_handler(struct pm_irq_chip *chip,
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int master, u8 master_val)
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{
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int block;
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for (block = 1; block < 8; block++)
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if (master_val & BIT(block))
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pm8821_irq_block_handler(chip, master, block);
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}
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static void pm8821_irq_handler(struct irq_desc *desc)
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{
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struct pm_irq_chip *chip = irq_desc_get_handler_data(desc);
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struct irq_chip *irq_chip = irq_desc_get_chip(desc);
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unsigned int master;
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int ret;
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chained_irq_enter(irq_chip, desc);
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ret = regmap_read(chip->regmap,
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PM8821_SSBI_REG_ADDR_IRQ_MASTER0, &master);
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if (ret) {
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pr_err("Failed to read master 0 ret=%d\n", ret);
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goto done;
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}
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/* bits 1 through 7 marks the first 7 blocks in master 0 */
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if (master & GENMASK(7, 1))
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pm8821_irq_master_handler(chip, 0, master);
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/* bit 0 marks if master 1 contains any bits */
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if (!(master & BIT(0)))
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goto done;
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ret = regmap_read(chip->regmap,
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PM8821_SSBI_REG_ADDR_IRQ_MASTER1, &master);
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if (ret) {
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pr_err("Failed to read master 1 ret=%d\n", ret);
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goto done;
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}
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pm8821_irq_master_handler(chip, 1, master);
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done:
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chained_irq_exit(irq_chip, desc);
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}
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static void pm8xxx_irq_mask_ack(struct irq_data *d)
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{
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struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
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@ -299,6 +392,104 @@ static const struct irq_domain_ops pm8xxx_irq_domain_ops = {
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.map = pm8xxx_irq_domain_map,
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};
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static void pm8821_irq_mask_ack(struct irq_data *d)
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{
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struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
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unsigned int pmirq = irqd_to_hwirq(d);
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u8 block, master;
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int irq_bit, rc;
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block = pmirq / 8;
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master = block / PM8821_BLOCKS_PER_MASTER;
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irq_bit = pmirq % 8;
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block %= PM8821_BLOCKS_PER_MASTER;
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rc = regmap_update_bits(chip->regmap,
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PM8821_SSBI_ADDR_IRQ_MASK(master, block),
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BIT(irq_bit), BIT(irq_bit));
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if (rc) {
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pr_err("Failed to mask IRQ:%d rc=%d\n", pmirq, rc);
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return;
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}
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rc = regmap_update_bits(chip->regmap,
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PM8821_SSBI_ADDR_IRQ_CLEAR(master, block),
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BIT(irq_bit), BIT(irq_bit));
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if (rc)
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pr_err("Failed to CLEAR IRQ:%d rc=%d\n", pmirq, rc);
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}
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static void pm8821_irq_unmask(struct irq_data *d)
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{
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struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
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unsigned int pmirq = irqd_to_hwirq(d);
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int irq_bit, rc;
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u8 block, master;
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block = pmirq / 8;
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master = block / PM8821_BLOCKS_PER_MASTER;
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irq_bit = pmirq % 8;
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block %= PM8821_BLOCKS_PER_MASTER;
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rc = regmap_update_bits(chip->regmap,
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PM8821_SSBI_ADDR_IRQ_MASK(master, block),
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BIT(irq_bit), ~BIT(irq_bit));
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if (rc)
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pr_err("Failed to read/write unmask IRQ:%d rc=%d\n", pmirq, rc);
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}
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static int pm8821_irq_get_irqchip_state(struct irq_data *d,
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enum irqchip_irq_state which,
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bool *state)
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{
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struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
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int rc, pmirq = irqd_to_hwirq(d);
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u8 block, irq_bit, master;
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unsigned int bits;
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block = pmirq / 8;
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master = block / PM8821_BLOCKS_PER_MASTER;
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irq_bit = pmirq % 8;
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block %= PM8821_BLOCKS_PER_MASTER;
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rc = regmap_read(chip->regmap,
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PM8821_SSBI_ADDR_IRQ_RT_STATUS(master, block), &bits);
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if (rc) {
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pr_err("Reading Status of IRQ %d failed rc=%d\n", pmirq, rc);
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return rc;
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}
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*state = !!(bits & BIT(irq_bit));
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return rc;
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}
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static struct irq_chip pm8821_irq_chip = {
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.name = "pm8821",
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.irq_mask_ack = pm8821_irq_mask_ack,
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.irq_unmask = pm8821_irq_unmask,
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.irq_get_irqchip_state = pm8821_irq_get_irqchip_state,
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.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
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};
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static int pm8821_irq_domain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct pm_irq_chip *chip = d->host_data;
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irq_set_chip_and_handler(irq, &pm8821_irq_chip, handle_level_irq);
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irq_set_chip_data(irq, chip);
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irq_set_noprobe(irq);
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return 0;
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}
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static const struct irq_domain_ops pm8821_irq_domain_ops = {
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.xlate = irq_domain_xlate_twocell,
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.map = pm8821_irq_domain_map,
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};
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static const struct regmap_config ssbi_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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@ -308,22 +499,41 @@ static const struct regmap_config ssbi_regmap_config = {
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.reg_write = ssbi_reg_write
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};
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static const struct pm_irq_data pm8xxx_data = {
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.num_irqs = PM8XXX_NR_IRQS,
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.irq_domain_ops = &pm8xxx_irq_domain_ops,
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.irq_handler = pm8xxx_irq_handler,
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};
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static const struct pm_irq_data pm8821_data = {
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.num_irqs = PM8821_NR_IRQS,
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.irq_domain_ops = &pm8821_irq_domain_ops,
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.irq_handler = pm8821_irq_handler,
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};
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static const struct of_device_id pm8xxx_id_table[] = {
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{ .compatible = "qcom,pm8018", },
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{ .compatible = "qcom,pm8058", },
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{ .compatible = "qcom,pm8921", },
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{ .compatible = "qcom,pm8018", .data = &pm8xxx_data},
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{ .compatible = "qcom,pm8058", .data = &pm8xxx_data},
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{ .compatible = "qcom,pm8821", .data = &pm8821_data},
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{ .compatible = "qcom,pm8921", .data = &pm8xxx_data},
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{ }
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};
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MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
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static int pm8xxx_probe(struct platform_device *pdev)
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{
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const struct pm_irq_data *data;
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struct regmap *regmap;
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int irq, rc;
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unsigned int val;
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u32 rev;
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struct pm_irq_chip *chip;
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unsigned int nirqs = PM8XXX_NR_IRQS;
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data = of_device_get_match_data(&pdev->dev);
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if (!data) {
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dev_err(&pdev->dev, "No matching driver data found\n");
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return -EINVAL;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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@ -354,25 +564,26 @@ static int pm8xxx_probe(struct platform_device *pdev)
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rev |= val << BITS_PER_BYTE;
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip) +
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sizeof(chip->config[0]) * nirqs,
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GFP_KERNEL);
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sizeof(chip->config[0]) * data->num_irqs,
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GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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platform_set_drvdata(pdev, chip);
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chip->regmap = regmap;
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chip->num_irqs = nirqs;
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chip->num_irqs = data->num_irqs;
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chip->num_blocks = DIV_ROUND_UP(chip->num_irqs, 8);
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chip->num_masters = DIV_ROUND_UP(chip->num_blocks, 8);
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spin_lock_init(&chip->pm_irq_lock);
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chip->irqdomain = irq_domain_add_linear(pdev->dev.of_node, nirqs,
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&pm8xxx_irq_domain_ops,
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chip->irqdomain = irq_domain_add_linear(pdev->dev.of_node,
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data->num_irqs,
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data->irq_domain_ops,
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chip);
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if (!chip->irqdomain)
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return -ENODEV;
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irq_set_chained_handler_and_data(irq, pm8xxx_irq_handler, chip);
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irq_set_chained_handler_and_data(irq, data->irq_handler, chip);
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irq_set_irq_wake(irq, 1);
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rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
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