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bnx2: Add missing memory barrier in bnx2_start_xmit()

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Sync DMA descriptor before hitting the TX mailbox for weak memory model
CPUs.

There has been discussions several years ago about this.  Some believe
that writel() should guarantee ordering.  Others want explicit barriers
if necessary.  Today writel() does not have the ordering guarantee and
many other drivers use explicit barriers.

Signed-off-by: Vlad Zolotarov <vlad@scalemp.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Vlad Zolotarov 2012-02-05 15:24:39 +00:00 committed by David S. Miller
parent b033281f61
commit 94bf91baf3
1 changed files with 3 additions and 0 deletions
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3
drivers/net/ethernet/broadcom/bnx2.c
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@ -6565,6 +6565,9 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev)
}
txbd->tx_bd_vlan_tag_flags |= TX_BD_FLAGS_END;
/* Sync BD data before updating TX mailbox */
wmb();
netdev_tx_sent_queue(txq, skb->len);
prod = NEXT_TX_BD(prod);