From 895a9613a1ee693c6b5017330c8093621f021107 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Wed, 5 Mar 2014 18:24:10 -0600 Subject: [PATCH 01/12] ARM: OMAP3: remove deprecated CONFIG_OMAP_IOMMU_IVA2 CONFIG_OMAP_IOMMU_IVA2 was defined originally to avoid conflicting usage by tidspbridge and other iommu users. The same can be achieved by marking the DT node disabled, so remove this obsolete flag and the corresponding hwmod data can be enabled. Cc: Paul Walmsley Signed-off-by: Florian Vaussard [s-anna@ti.com: revise commit log] Signed-off-by: Suman Anna Acked-by: Laurent Pinchart Acked-by: Tony Lindgren Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 8 -------- arch/arm/plat-omap/Kconfig | 3 --- 2 files changed, 11 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 4c3b1e6df508..81dd071dc217 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -3029,8 +3029,6 @@ static struct omap_hwmod omap3xxx_mmu_isp_hwmod = { .flags = HWMOD_NO_IDLEST, }; -#ifdef CONFIG_OMAP_IOMMU_IVA2 - /* mmu iva */ static struct omap_mmu_dev_attr mmu_iva_dev_attr = { @@ -3082,8 +3080,6 @@ static struct omap_hwmod omap3xxx_mmu_iva_hwmod = { .flags = HWMOD_NO_IDLEST, }; -#endif - /* l4_per -> gpio4 */ static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = { { @@ -3855,9 +3851,7 @@ static struct omap_hwmod_ocp_if *omap34xx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__hdq1w, &omap3xxx_sad2d__l3, &omap3xxx_l4_core__mmu_isp, -#ifdef CONFIG_OMAP_IOMMU_IVA2 &omap3xxx_l3_main__mmu_iva, -#endif &omap34xx_l4_core__ssi, NULL }; @@ -3881,9 +3875,7 @@ static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__hdq1w, &omap3xxx_sad2d__l3, &omap3xxx_l4_core__mmu_isp, -#ifdef CONFIG_OMAP_IOMMU_IVA2 &omap3xxx_l3_main__mmu_iva, -#endif NULL }; diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 436ea97074cd..02fc10d2d63b 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -86,9 +86,6 @@ config OMAP_MUX_WARNINGS to change the pin multiplexing setup. When there are no warnings printed, it's safe to deselect OMAP_MUX for your product. -config OMAP_IOMMU_IVA2 - bool - config OMAP_MPU_TIMER bool "Use mpu timer" depends on ARCH_OMAP1 From 200a274f359995df239a46ac8f15ccd48261a458 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 5 Mar 2014 18:24:11 -0600 Subject: [PATCH 02/12] ARM: OMAP3: fix iva mmu programming issues The IVA MMU is not functional when used through the hwmod and omap_device layers. Add fixes to clockdomain and hwmod data to have it functional. The hwmod changes are needed to enable the clock, and the SWSUP change is needed to wakeup the domain because the power domain is programmed to be in RET, and there is no automatic power domain switching to ON. Signed-off-by: Suman Anna Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clockdomains3xxx_data.c | 2 +- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c index e6b91e552d3d..f03dc97921ad 100644 --- a/arch/arm/mach-omap2/clockdomains3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c @@ -247,7 +247,7 @@ static struct clockdomain neon_clkdm = { static struct clockdomain iva2_clkdm = { .name = "iva2_clkdm", .pwrdm = { .name = "iva2_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, + .flags = CLKDM_CAN_SWSUP, .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT, .wkdep_srcs = iva2_wkdeps, .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 81dd071dc217..9c7e23aa0e7f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -3068,12 +3068,16 @@ static struct omap_hwmod omap3xxx_mmu_iva_hwmod = { .name = "mmu_iva", .class = &omap3xxx_mmu_hwmod_class, .mpu_irqs = omap3xxx_mmu_iva_irqs, + .clkdm_name = "iva2_clkdm", .rst_lines = omap3xxx_mmu_iva_resets, .rst_lines_cnt = ARRAY_SIZE(omap3xxx_mmu_iva_resets), .main_clk = "iva2_ck", .prcm = { .omap2 = { .module_offs = OMAP3430_IVA2_MOD, + .module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT, }, }, .dev_attr = &mmu_iva_dev_attr, From 0ac4f03f62ce17ce96bab06d7b22bafc3c6f28f1 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 5 Mar 2014 18:24:12 -0600 Subject: [PATCH 03/12] ARM: OMAP2+: change the ISP device archdata MMU name for DT The IOMMU DT adaptation support uses the device name instead of an iommu object name. Fixup the ISP device archdata MMU name at runtime if using DT-boot. This allows the OMAP3 camera to be functional in both legacy and DT boots. The iommu object names should eventually vanish when all the IOMMU users have been converted to DT nodes. Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/devices.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 0dd6398bade4..e58609b312c7 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -229,6 +229,9 @@ static struct omap_iommu_arch_data omap3_isp_iommu = { int omap3_init_camera(struct isp_platform_data *pdata) { + if (of_have_populated_dt()) + omap3_isp_iommu.name = "480bd400.mmu"; + omap3isp_device.dev.platform_data = pdata; omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu; From 910f1678bba914973c077a8b120444eb3bd979d6 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 5 Mar 2014 18:24:13 -0600 Subject: [PATCH 04/12] ARM: OMAP2+: use pdata quirks for iommu reset lines The OMAP iommu driver performs the reset management for the iommu instances in processor sub-systems using the omap_device API which are currently supplied as platform data ops. Use pdata quirks to maintain the functionality as the OMAP iommu driver gets converted to use DT nodes, until the reset portions are decoupled from omap_hwmod/omap_device into a separate reset driver. This patch adds the pdata quirks for the reset management of iommus within the DSP (OMAP3 & OMAP4) and IPU subsystems (OMAP4). Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pdata-quirks.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 9723886c18ba..24bd3da928fa 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -16,12 +16,14 @@ #include #include +#include #include "am35xx.h" #include "common.h" #include "common-board-devices.h" #include "dss-common.h" #include "control.h" +#include "omap_device.h" struct pdata_init { const char *compatible; @@ -78,6 +80,12 @@ static void __init hsmmc2_internal_input_clk(void) omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); } +static struct iommu_platform_data omap3_iommu_pdata = { + .reset_name = "mmu", + .assert_reset = omap_device_assert_hardreset, + .deassert_reset = omap_device_deassert_hardreset, +}; + static int omap3_sbc_t3730_twl_callback(struct device *dev, unsigned gpio, unsigned ngpio) @@ -231,6 +239,12 @@ static void __init omap4_panda_legacy_init(void) omap4_panda_display_init_of(); legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53); } + +static struct iommu_platform_data omap4_iommu_pdata = { + .reset_name = "mmu_cache", + .assert_reset = omap_device_assert_hardreset, + .deassert_reset = omap_device_deassert_hardreset, +}; #endif #ifdef CONFIG_SOC_AM33XX @@ -292,6 +306,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_ARCH_OMAP3 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata), + OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", + &omap3_iommu_pdata), /* Only on am3517 */ OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", @@ -300,6 +316,10 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_ARCH_OMAP4 OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata), + OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu", + &omap4_iommu_pdata), + OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu", + &omap4_iommu_pdata), #endif { /* sentinel */ }, }; From 1528ed0400e4852316a66cacc55b57e46e187a5a Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 5 Mar 2014 18:24:14 -0600 Subject: [PATCH 05/12] ARM: OMAP5: hwmod data: add mmu data for ipu & dsp A new MMU hwmod class and data structures are created to represent the MMUs within the IPU and DSP processor subsystems in OMAP5. The MMUs in OMAP5 are identical to those in OMAP4. Cc: Benoit Cousson Signed-off-by: Suman Anna Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 83 ++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index e297d6231c3a..892317294fdc 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -1121,6 +1121,71 @@ static struct omap_hwmod omap54xx_mmc5_hwmod = { }, }; +/* + * 'mmu' class + * The memory management unit performs virtual to physical address translation + * for its requestors. + */ + +static struct omap_hwmod_class_sysconfig omap54xx_mmu_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | + SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | + SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap54xx_mmu_hwmod_class = { + .name = "mmu", + .sysc = &omap54xx_mmu_sysc, +}; + +static struct omap_hwmod_rst_info omap54xx_mmu_dsp_resets[] = { + { .name = "mmu_cache", .rst_shift = 1 }, +}; + +static struct omap_hwmod omap54xx_mmu_dsp_hwmod = { + .name = "mmu_dsp", + .class = &omap54xx_mmu_hwmod_class, + .clkdm_name = "dsp_clkdm", + .rst_lines = omap54xx_mmu_dsp_resets, + .rst_lines_cnt = ARRAY_SIZE(omap54xx_mmu_dsp_resets), + .main_clk = "dpll_iva_h11x2_ck", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP54XX_CM_DSP_DSP_CLKCTRL_OFFSET, + .rstctrl_offs = OMAP54XX_RM_DSP_RSTCTRL_OFFSET, + .context_offs = OMAP54XX_RM_DSP_DSP_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, +}; + +/* mmu ipu */ +static struct omap_hwmod_rst_info omap54xx_mmu_ipu_resets[] = { + { .name = "mmu_cache", .rst_shift = 2 }, +}; + +static struct omap_hwmod omap54xx_mmu_ipu_hwmod = { + .name = "mmu_ipu", + .class = &omap54xx_mmu_hwmod_class, + .clkdm_name = "ipu_clkdm", + .rst_lines = omap54xx_mmu_ipu_resets, + .rst_lines_cnt = ARRAY_SIZE(omap54xx_mmu_ipu_resets), + .main_clk = "dpll_core_h22x2_ck", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP54XX_CM_IPU_IPU_CLKCTRL_OFFSET, + .rstctrl_offs = OMAP54XX_RM_IPU_RSTCTRL_OFFSET, + .context_offs = OMAP54XX_RM_IPU_IPU_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, +}; + /* * 'mpu' class * mpu sub-system @@ -1763,6 +1828,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_1 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_cfg -> mmu_dsp */ +static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mmu_dsp = { + .master = &omap54xx_l4_cfg_hwmod, + .slave = &omap54xx_mmu_dsp_hwmod, + .clk = "l4_root_clk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* mpu -> l3_main_1 */ static struct omap_hwmod_ocp_if omap54xx_mpu__l3_main_1 = { .master = &omap54xx_mpu_hwmod, @@ -1787,6 +1860,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l3_main_2 -> mmu_ipu */ +static struct omap_hwmod_ocp_if omap54xx_l3_main_2__mmu_ipu = { + .master = &omap54xx_l3_main_2_hwmod, + .slave = &omap54xx_mmu_ipu_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l3_main_1 -> l3_main_3 */ static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l3_main_3 = { .master = &omap54xx_l3_main_1_hwmod, @@ -2345,6 +2426,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { &omap54xx_l4_wkup__counter_32k, &omap54xx_l4_cfg__dma_system, &omap54xx_l4_abe__dmic, + &omap54xx_l4_cfg__mmu_dsp, &omap54xx_mpu__emif1, &omap54xx_mpu__emif2, &omap54xx_l4_wkup__gpio1, @@ -2360,6 +2442,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { &omap54xx_l4_per__i2c3, &omap54xx_l4_per__i2c4, &omap54xx_l4_per__i2c5, + &omap54xx_l3_main_2__mmu_ipu, &omap54xx_l4_wkup__kbd, &omap54xx_l4_cfg__mailbox, &omap54xx_l4_abe__mcbsp1, From 67eb1e6e4ae7ceaeb81b7a89f8fe85b93240f73b Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 5 Mar 2014 18:24:15 -0600 Subject: [PATCH 06/12] ARM: OMAP2+: extend iommu pdata-quirks to OMAP5 OMAP5 has the same iommus as OMAP4, so extend the OMAP4 iommu pdata quirks for OMAP5 as well. Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pdata-quirks.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 24bd3da928fa..db242c483dc0 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -239,7 +239,9 @@ static void __init omap4_panda_legacy_init(void) omap4_panda_display_init_of(); legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53); } +#endif +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) static struct iommu_platform_data omap4_iommu_pdata = { .reset_name = "mmu_cache", .assert_reset = omap_device_assert_hardreset, @@ -316,6 +318,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_ARCH_OMAP4 OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata), +#endif +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu", &omap4_iommu_pdata), OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu", From b7cd959786539a95e73af0b8462c02913f876809 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Wed, 5 Mar 2014 18:24:16 -0600 Subject: [PATCH 07/12] ARM: dts: OMAP3: Update ISP IOMMU node Update the IOMMU node for the camera subsystem as per the OMAP IOMMU bindings. Signed-off-by: Florian Vaussard [s-anna@ti.com: corrected interrupt number] Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index b91117a38100..68c1afbfb368 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -416,10 +416,11 @@ }; mmu_isp: mmu@480bd400 { - compatible = "ti,omap3-mmu-isp"; - ti,hwmods = "mmu_isp"; + compatible = "ti,omap2-iommu"; reg = <0x480bd400 0x80>; - interrupts = <8>; + interrupts = <24>; + ti,hwmods = "mmu_isp"; + ti,#tlb-entries = <8>; }; wdt2: wdt@48314000 { From 40ac051d11529ae2255f1a830b52f0c2a7a1621d Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Wed, 5 Mar 2014 18:24:17 -0600 Subject: [PATCH 08/12] ARM: dts: OMAP3: Add IVA IOMMU node Add the DT node for the IOMMU within the DSP subsystem. The entry is disabled to keep in line with the hwmod usage as intended by the deprecated CONFIG_OMAP_IOMMU_IVA2 flag. Signed-off-by: Florian Vaussard [s-anna@ti.com: split the entry and disable the node] Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 68c1afbfb368..a089e6e00457 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -423,6 +423,14 @@ ti,#tlb-entries = <8>; }; + mmu_iva: mmu@5d000000 { + compatible = "ti,omap2-iommu"; + reg = <0x5d000000 0x80>; + interrupts = <28>; + ti,hwmods = "mmu_iva"; + status = "disabled"; + }; + wdt2: wdt@48314000 { compatible = "ti,omap3-wdt"; reg = <0x48314000 0x80>; From 21bd85a18ad6a38bbd17ec8265daa8b6500b4d9a Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Wed, 5 Mar 2014 18:24:18 -0600 Subject: [PATCH 09/12] ARM: dts: OMAP4: Add IOMMU nodes Add the IOMMU nodes for the DSP and IPU subsystems. The MMU within the IPU sub-system also supports a bus error back capability, not available on the DSP MMU. Signed-off-by: Florian Vaussard [s-anna@ti.com: IPU bus error back addition] Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 4e15be59b839..3dfec86c1dc9 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -467,6 +467,21 @@ dma-names = "tx", "rx"; }; + mmu_dsp: mmu@4a066000 { + compatible = "ti,omap4-iommu"; + reg = <0x4a066000 0x100>; + interrupts = ; + ti,hwmods = "mmu_dsp"; + }; + + mmu_ipu: mmu@55082000 { + compatible = "ti,omap4-iommu"; + reg = <0x55082000 0x100>; + interrupts = ; + ti,hwmods = "mmu_ipu"; + ti,iommu-bus-err-back; + }; + wdt2: wdt@4a314000 { compatible = "ti,omap4-wdt", "ti,omap3-wdt"; reg = <0x4a314000 0x80>; From 2dcfa56e8207d1af230252face1e7c63a7634ac3 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 5 Mar 2014 18:24:19 -0600 Subject: [PATCH 10/12] ARM: dts: OMAP5: Add IOMMU nodes The IOMMU DT nodes have been added for the DSP and IPU subsystems. The MMUs in OMAP5 are identical to those in OMAP4, including the bus error back capability on IPU. Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap5.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 859a800a77fc..757f0b9343c2 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -520,6 +520,21 @@ dma-names = "tx", "rx"; }; + mmu_dsp: mmu@4a066000 { + compatible = "ti,omap4-iommu"; + reg = <0x4a066000 0x100>; + interrupts = ; + ti,hwmods = "mmu_dsp"; + }; + + mmu_ipu: mmu@55082000 { + compatible = "ti,omap4-iommu"; + reg = <0x55082000 0x100>; + interrupts = ; + ti,hwmods = "mmu_ipu"; + ti,iommu-bus-err-back; + }; + keypad: keypad@4ae1c000 { compatible = "ti,omap4-keypad"; reg = <0x4ae1c000 0x400>; From cae2a9e3abf27ad4eb0c0341bf34e4a6349c314f Mon Sep 17 00:00:00 2001 From: Yegor Yefremov Date: Mon, 10 Mar 2014 16:26:57 +0100 Subject: [PATCH 11/12] ARM: dts: am335x-evmsk: enable DMA controller for USB Enable DMA controller for USB Signed-off-by: Yegor Yefremov Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am335x-evmsk.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index b50e9efc7741..fd8bd3a254fe 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -378,6 +378,10 @@ status = "okay"; dr_mode = "host"; }; + + dma-controller@07402000 { + status = "okay"; + }; }; &epwmss2 { From e1902bbe44844597a38c8cbae30ca895f6e126ee Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 12 Mar 2014 11:49:12 +0100 Subject: [PATCH 12/12] ARM: dts: Add MMC2/SDIO/WLAN support for cm-t3530 Add support for the MMC2/SDIO WiFi Libertas (Marvell) module available on the CM-T3530 SOM. Cc: Dmitry Lifshitz Cc: Igor Grinberg Signed-off-by: Stefan Roese Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-cm-t3530.dts | 36 ++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/omap3-cm-t3530.dts b/arch/arm/boot/dts/omap3-cm-t3530.dts index 9faf1cd1dcaa..d1458496520e 100644 --- a/arch/arm/boot/dts/omap3-cm-t3530.dts +++ b/arch/arm/boot/dts/omap3-cm-t3530.dts @@ -9,4 +9,40 @@ / { model = "CompuLab CM-T3530"; compatible = "compulab,omap3-cm-t3530", "ti,omap34xx", "ti,omap3"; + + /* Regulator to trigger the reset signal of the Wifi module */ + mmc2_sdio_reset: regulator-mmc2-sdio-reset { + compatible = "regulator-fixed"; + regulator-name = "regulator-mmc2-sdio-reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&omap3_pmx_core { + mmc2_pins: pinmux_mmc2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ + OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ + OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ + OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ + OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ + OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ + OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */ + OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */ + OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */ + OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */ + >; + }; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <&mmc2_sdio_reset>; + non-removable; + bus-width = <4>; + cap-power-off-card; };