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sh-pfc: Add function to retrieve a pin instance from its pin number

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This prepares support for sparse pin numbering. The function currently
just performs and indexed lookup in the pins array.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Laurent Pinchart 2013-02-14 22:35:09 +01:00
parent 0b73ee5d53
commit 934cb02bab
4 changed files with 22 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/pinctrl/sh-pfc/core.c
View File

@ -78,6 +78,11 @@ static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
return (void __iomem *)address;
}
struct sh_pfc_pin *sh_pfc_get_pin(struct sh_pfc *pfc, unsigned int pin)
{
return &pfc->info->pins[pin];
}
static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
{
if (enum_id < r->begin)
@ -278,7 +283,7 @@ static void sh_pfc_setup_data_regs(struct sh_pfc *pfc)
void sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
struct pinmux_data_reg **drp, int *bitp)
{
struct sh_pfc_pin *gpiop = &pfc->info->pins[gpio];
struct sh_pfc_pin *gpiop = sh_pfc_get_pin(pfc, gpio);
int k, n;
k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;

1
drivers/pinctrl/sh-pfc/core.h
View File

@ -49,6 +49,7 @@ void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
unsigned long value);
void sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
struct pinmux_data_reg **drp, int *bitp);
struct sh_pfc_pin *sh_pfc_get_pin(struct sh_pfc *pfc, unsigned int pin);
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type,
int cfg_mode);

3
drivers/pinctrl/sh-pfc/gpio.c
View File

@ -43,8 +43,9 @@ static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
{
struct sh_pfc *pfc = gpio_to_pfc(gc);
struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
if (pfc->info->pins[offset].enum_id == 0)
if (pin->enum_id == 0)
return -EINVAL;
return pinctrl_request_gpio(offset);

23
drivers/pinctrl/sh-pfc/pinctrl.c
View File

@ -119,14 +119,15 @@ static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
int new_type)
{
unsigned int mark = pfc->info->pins[offset].enum_id;
struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
unsigned int mark = pin->enum_id;
unsigned long flags;
int pinmux_type;
int ret = -EINVAL;
spin_lock_irqsave(&pfc->lock, flags);
pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
/*
* See if the present config needs to first be de-configured.
@ -156,8 +157,8 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_REQ) != 0)
goto err;
pfc->info->pins[offset].flags &= ~PINMUX_FLAG_TYPE;
pfc->info->pins[offset].flags |= new_type;
pin->flags &= ~PINMUX_FLAG_TYPE;
pin->flags |= new_type;
ret = 0;
@ -173,12 +174,13 @@ static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
{
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
unsigned long flags;
int ret, pinmux_type;
spin_lock_irqsave(&pfc->lock, flags);
pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
switch (pinmux_type) {
case PINMUX_TYPE_GPIO:
@ -206,15 +208,15 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
{
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
unsigned long flags;
int pinmux_type;
spin_lock_irqsave(&pfc->lock, flags);
pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
sh_pfc_config_mux(pfc, pfc->info->pins[offset].enum_id, pinmux_type,
GPIO_CFG_FREE);
sh_pfc_config_mux(pfc, pin->enum_id, pinmux_type, GPIO_CFG_FREE);
spin_unlock_irqrestore(&pfc->lock, flags);
}
@ -240,13 +242,14 @@ static const struct pinmux_ops sh_pfc_pinmux_ops = {
.gpio_set_direction = sh_pfc_gpio_set_direction,
};
static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
unsigned long *config)
{
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, _pin);
*config = pfc->info->pins[pin].flags & PINMUX_FLAG_TYPE;
*config = pin->flags & PINMUX_FLAG_TYPE;
return 0;
}