renegade-project/linux-next
2
0
Fork 0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-24 05:04:00 +08:00
Code

rt2x00: Mask out unused interrupts in rt2800pci

Browse Source 
We don't use all available interrupts in rt2800pci. Mask out all unused
interrupts to avoid waking up without having anything to do.

Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Helmut Schaa 2010-09-08 20:56:52 +02:00 committed by John W. Linville
parent 0204464329
commit 93149cf87b
1 changed files with 13 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
drivers/net/wireless/rt2x00/rt2800pci.c
View File

@ -342,24 +342,24 @@ static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
}
rt2800_register_read(rt2x00dev, INT_MASK_CSR, &reg);
rt2x00_set_field32(&reg, INT_MASK_CSR_RXDELAYINT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_TXDELAYINT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_RXDELAYINT, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_TXDELAYINT, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_RX_DONE, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_AC0_DMA_DONE, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_AC1_DMA_DONE, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_AC2_DMA_DONE, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_AC3_DMA_DONE, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_HCCA_DMA_DONE, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_MGMT_DMA_DONE, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_MCU_COMMAND, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_RXTX_COHERENT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_AC0_DMA_DONE, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_AC1_DMA_DONE, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_AC2_DMA_DONE, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_AC3_DMA_DONE, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_HCCA_DMA_DONE, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_MGMT_DMA_DONE, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_MCU_COMMAND, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_RXTX_COHERENT, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_TBTT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_PRE_TBTT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_TX_FIFO_STATUS, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_AUTO_WAKEUP, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_GPTIMER, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_RX_COHERENT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_TX_COHERENT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_GPTIMER, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_RX_COHERENT, 0);
rt2x00_set_field32(&reg, INT_MASK_CSR_TX_COHERENT, 0);
rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
}