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DM9000: Fix endian-ness of data accesses.
Patch from: Laurent Pinchart <laurentp@cse-semaphore.com> This patch splits the receive status in 8bit wide fields and convert the packet length from little endian to CPU byte order. Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -867,7 +867,8 @@ dm9000_timer(unsigned long data)
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}
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struct dm9000_rxhdr {
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u16 RxStatus;
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u8 RxPktReady;
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u8 RxStatus;
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u16 RxLen;
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} __attribute__((__packed__));
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@ -908,7 +909,7 @@ dm9000_rx(struct net_device *dev)
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(db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
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RxLen = rxhdr.RxLen;
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RxLen = le16_to_cpu(rxhdr.RxLen);
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/* Packet Status check */
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if (RxLen < 0x40) {
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@ -920,17 +921,17 @@ dm9000_rx(struct net_device *dev)
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PRINTK1("RST: RX Len:%x\n", RxLen);
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}
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if (rxhdr.RxStatus & 0xbf00) {
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if (rxhdr.RxStatus & 0xbf) {
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GoodPacket = false;
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if (rxhdr.RxStatus & 0x100) {
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if (rxhdr.RxStatus & 0x01) {
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PRINTK1("fifo error\n");
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dev->stats.rx_fifo_errors++;
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}
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if (rxhdr.RxStatus & 0x200) {
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if (rxhdr.RxStatus & 0x02) {
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PRINTK1("crc error\n");
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dev->stats.rx_crc_errors++;
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}
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if (rxhdr.RxStatus & 0x8000) {
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if (rxhdr.RxStatus & 0x80) {
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PRINTK1("length error\n");
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dev->stats.rx_length_errors++;
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}
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