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i40e: whitespace paren and comment tweaks
Addresses a few code format issues that have crept in over time. Change-Id: I1a62cbd16b29a218a933b0f7176abe748f9615e8 Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -672,7 +672,7 @@ static bool i40e_asq_done(struct i40e_hw *hw)
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/* AQ designers suggest use of head for better
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* timing reliability than DD bit
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*/
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return (rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use);
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return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;
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}
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@ -682,7 +682,7 @@ static bool i40e_asq_done(struct i40e_hw *hw)
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* @desc: prefilled descriptor describing the command (non DMA mem)
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* @buff: buffer to use for indirect commands
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* @buff_size: size of buffer for indirect commands
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* @opaque: pointer to info to be used in async cleanup
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* @cmd_details: pointer to command details structure
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*
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* This is the main send command driver routine for the Admin Queue send
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* queue. It runs the queue, cleans the queue, etc
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@ -406,6 +406,7 @@ i40e_status i40e_pf_reset(struct i40e_hw *hw)
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}
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i40e_clear_pxe_mode(hw);
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return 0;
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}
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@ -89,7 +89,7 @@ typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct i40e_aq_desc *);
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#define I40E_QTX_CTL_VF_QUEUE 0x0
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#define I40E_QTX_CTL_PF_QUEUE 0x2
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/* debug masks */
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/* debug masks - set these bits in hw->debug_mask to control output */
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enum i40e_debug_mask {
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I40E_DEBUG_INIT = 0x00000001,
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I40E_DEBUG_RELEASE = 0x00000002,
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@ -103,10 +103,10 @@ enum i40e_debug_mask {
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I40E_DEBUG_DCB = 0x00000400,
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I40E_DEBUG_DIAG = 0x00000800,
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I40E_DEBUG_AQ_MESSAGE = 0x01000000, /* for i40e_debug() */
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I40E_DEBUG_AQ_MESSAGE = 0x01000000,
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I40E_DEBUG_AQ_DESCRIPTOR = 0x02000000,
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I40E_DEBUG_AQ_DESC_BUFFER = 0x04000000,
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I40E_DEBUG_AQ_COMMAND = 0x06000000, /* for i40e_debug_aq() */
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I40E_DEBUG_AQ_COMMAND = 0x06000000,
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I40E_DEBUG_AQ = 0x0F000000,
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I40E_DEBUG_USER = 0xF0000000,
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@ -520,7 +520,7 @@ enum i40e_rx_desc_status_bits {
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#define I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT I40E_RX_DESC_STATUS_TSYNVALID_SHIFT
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#define I40E_RXD_QW1_STATUS_TSYNVALID_MASK (0x1UL << \
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I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT)
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I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT)
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enum i40e_rx_desc_fltstat_values {
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I40E_RX_DESC_FLTSTAT_NO_DATA = 0,
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