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ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-3-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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@ -351,22 +351,8 @@
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status = "disabled";
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i2c6: i2c@600 {
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compatible = "atmel,sama5d2-i2c";
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reg = <0x600 0x200>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
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dmas = <&dma0
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(19))>,
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<&dma0
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(20))>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flx4_default>;
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atmel,fifo-size = <16>;
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status = "disabled";
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};
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};
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@ -208,41 +208,21 @@
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status = "okay";
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uart9: serial@200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0x200 0x200>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
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clock-names = "usart";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flx4_default>;
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atmel,fifo-size = <32>;
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status = "disabled"; /* Conflict with spi6 and i2c6. */
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};
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spi6: spi@400 {
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compatible = "atmel,at91rm9200-spi";
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reg = <0x400 0x200>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
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clock-names = "spi_clk";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>;
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atmel,fifo-size = <16>;
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status = "okay"; /* Conflict with uart5 and i2c6. */
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};
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i2c6: i2c@600 {
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compatible = "atmel,sama5d2-i2c";
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reg = <0x600 0x200>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
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dmas = <0>, <0>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flx4_default>;
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atmel,fifo-size = <16>;
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status = "disabled"; /* Conflict with uart5 and spi6. */
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};
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};
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@ -202,17 +202,9 @@
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status = "okay";
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i2c6: i2c@600 {
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compatible = "atmel,sama5d2-i2c";
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reg = <0x600 0x200>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
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dmas = <0>, <0>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flx4_default>;
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atmel,fifo-size = <16>;
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status = "okay";
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mcp16502@5b {
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@ -378,20 +378,12 @@
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status = "okay";
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i2c6: i2c@600 {
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compatible = "atmel,sama5d2-i2c";
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reg = <0x600 0x200>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
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dmas = <0>, <0>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_flx4_default>;
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pinctrl-1 = <&pinctrl_flx4_gpio>;
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sda-gpios = <&pioA PIN_PD12 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&pioA PIN_PD13 GPIO_ACTIVE_HIGH>;
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atmel,fifo-size = <16>;
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i2c-analog-filter;
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i2c-digital-filter;
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i2c-digital-filter-width-ns = <35>;
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@ -814,6 +814,46 @@
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#size-cells = <1>;
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ranges = <0x0 0xfc018000 0x800>;
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status = "disabled";
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uart9: serial@200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0x200 0x200>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
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clock-names = "usart";
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atmel,fifo-size = <32>;
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status = "disabled";
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};
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spi6: spi@400 {
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compatible = "atmel,at91rm9200-spi";
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reg = <0x400 0x200>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
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clock-names = "spi_clk";
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atmel,fifo-size = <16>;
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status = "disabled";
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};
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i2c6: i2c@600 {
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compatible = "atmel,sama5d2-i2c";
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reg = <0x600 0x200>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
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dmas = <&dma0
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(AT91_XDMAC_DT_MEM_IF(0) |
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AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(19))>,
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<&dma0
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(AT91_XDMAC_DT_MEM_IF(0) |
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AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(20))>;
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dma-names = "tx", "rx";
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atmel,fifo-size = <16>;
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status = "disabled";
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};
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};
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trng@fc01c000 {
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