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ahci: separate out ahci_exec_polled_cmd()
Separate out ahci_exec_polled_cmd() from ahci_softreset(). This will be used to implement ahci_pmp_read/write(). ahci_exec_polled_cmd() performs reset_engine before returning if the command fails (times out). This is to improve robustness. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -993,17 +993,42 @@ static int ahci_kick_engine(struct ata_port *ap, int force_restart)
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return rc;
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}
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static int ahci_exec_polled_cmd(struct ata_port *ap, int pmp,
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struct ata_taskfile *tf, int is_cmd, u16 flags,
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unsigned long timeout_msec)
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{
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const u32 cmd_fis_len = 5; /* five dwords */
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struct ahci_port_priv *pp = ap->private_data;
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void __iomem *port_mmio = ahci_port_base(ap);
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u8 *fis = pp->cmd_tbl;
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u32 tmp;
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/* prep the command */
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ata_tf_to_fis(tf, pmp, is_cmd, fis);
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ahci_fill_cmd_slot(pp, 0, cmd_fis_len | flags | (pmp << 12));
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/* issue & wait */
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writel(1, port_mmio + PORT_CMD_ISSUE);
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if (timeout_msec) {
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tmp = ata_wait_register(port_mmio + PORT_CMD_ISSUE, 0x1, 0x1,
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1, timeout_msec);
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if (tmp & 0x1) {
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ahci_kick_engine(ap, 1);
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return -EBUSY;
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}
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} else
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readl(port_mmio + PORT_CMD_ISSUE); /* flush */
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return 0;
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}
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static int ahci_softreset(struct ata_port *ap, unsigned int *class,
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unsigned long deadline)
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{
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struct ahci_port_priv *pp = ap->private_data;
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void __iomem *port_mmio = ahci_port_base(ap);
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const u32 cmd_fis_len = 5; /* five dwords */
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const char *reason = NULL;
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unsigned long now, msecs;
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struct ata_taskfile tf;
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u32 tmp;
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u8 *fis;
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int rc;
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DPRINTK("ENTER\n");
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@ -1021,7 +1046,6 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class,
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"failed to reset engine (errno=%d)", rc);
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ata_tf_init(ap->device, &tf);
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fis = pp->cmd_tbl;
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/* issue the first D2H Register FIS */
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msecs = 0;
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@ -1029,16 +1053,9 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class,
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if (time_after(now, deadline))
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msecs = jiffies_to_msecs(deadline - now);
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ahci_fill_cmd_slot(pp, 0,
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cmd_fis_len | AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY);
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tf.ctl |= ATA_SRST;
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ata_tf_to_fis(&tf, 0, 0, fis);
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writel(1, port_mmio + PORT_CMD_ISSUE);
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tmp = ata_wait_register(port_mmio + PORT_CMD_ISSUE, 0x1, 0x1, 1, msecs);
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if (tmp & 0x1) {
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if (ahci_exec_polled_cmd(ap, 0, &tf, 0,
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AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY, msecs)) {
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rc = -EIO;
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reason = "1st FIS failed";
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goto fail;
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@ -1048,13 +1065,8 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class,
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msleep(1);
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/* issue the second D2H Register FIS */
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ahci_fill_cmd_slot(pp, 0, cmd_fis_len);
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tf.ctl &= ~ATA_SRST;
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ata_tf_to_fis(&tf, 0, 0, fis);
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writel(1, port_mmio + PORT_CMD_ISSUE);
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readl(port_mmio + PORT_CMD_ISSUE); /* flush */
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ahci_exec_polled_cmd(ap, 0, &tf, 0, 0, 0);
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/* spec mandates ">= 2ms" before checking status.
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* We wait 150ms, because that was the magic delay used for
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