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dmaengine: xilinx_dma: Refactor axidma channel allocation
In axidma alloc_chan_resources merge BD and cyclic BD allocation. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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651022382c
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91b438286e
@ -887,6 +887,24 @@ static int xilinx_dma_alloc_chan_resources(struct dma_chan *dchan)
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chan->id);
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return -ENOMEM;
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}
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/*
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* For cyclic DMA mode we need to program the tail Descriptor
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* register with a value which is not a part of the BD chain
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* so allocating a desc segment during channel allocation for
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* programming tail descriptor.
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*/
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chan->cyclic_seg_v = dma_zalloc_coherent(chan->dev,
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sizeof(*chan->cyclic_seg_v),
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&chan->cyclic_seg_p, GFP_KERNEL);
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if (!chan->cyclic_seg_v) {
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dev_err(chan->dev,
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"unable to allocate desc segment for cyclic DMA\n");
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dma_free_coherent(chan->dev, sizeof(*chan->seg_v) *
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XILINX_DMA_NUM_DESCS, chan->seg_v,
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chan->seg_p);
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return -ENOMEM;
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}
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chan->cyclic_seg_v->phys = chan->cyclic_seg_p;
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for (i = 0; i < XILINX_DMA_NUM_DESCS; i++) {
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chan->seg_v[i].hw.next_desc =
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@ -922,24 +940,6 @@ static int xilinx_dma_alloc_chan_resources(struct dma_chan *dchan)
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return -ENOMEM;
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}
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if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {
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/*
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* For cyclic DMA mode we need to program the tail Descriptor
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* register with a value which is not a part of the BD chain
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* so allocating a desc segment during channel allocation for
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* programming tail descriptor.
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*/
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chan->cyclic_seg_v = dma_zalloc_coherent(chan->dev,
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sizeof(*chan->cyclic_seg_v),
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&chan->cyclic_seg_p, GFP_KERNEL);
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if (!chan->cyclic_seg_v) {
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dev_err(chan->dev,
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"unable to allocate desc segment for cyclic DMA\n");
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return -ENOMEM;
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}
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chan->cyclic_seg_v->phys = chan->cyclic_seg_p;
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}
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dma_cookie_init(dchan);
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if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {
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