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synced 2024-12-23 04:34:11 +08:00
spi/s3c64xx: Remove S3C_DMA support
All the platforms which use the old S3C_DMA API have now been converted to dmaengine so we can remove the legacy code from the driver, simplifying maintenance. Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -34,10 +34,6 @@
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#include <linux/platform_data/spi-s3c64xx.h>
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#ifdef CONFIG_S3C_DMA
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#include <mach/dma.h>
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#endif
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#define MAX_SPI_PORTS 3
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#define S3C64XX_SPI_QUIRK_POLL (1 << 0)
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@ -200,9 +196,6 @@ struct s3c64xx_spi_driver_data {
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unsigned cur_speed;
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struct s3c64xx_spi_dma_data rx_dma;
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struct s3c64xx_spi_dma_data tx_dma;
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#ifdef CONFIG_S3C_DMA
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struct samsung_dma_ops *ops;
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#endif
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struct s3c64xx_spi_port_config *port_conf;
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unsigned int port_id;
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bool cs_gpio;
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@ -284,180 +277,6 @@ static void s3c64xx_spi_dmacb(void *data)
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spin_unlock_irqrestore(&sdd->lock, flags);
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}
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#ifdef CONFIG_S3C_DMA
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/* FIXME: remove this section once arch/arm/mach-s3c64xx uses dmaengine */
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static struct s3c2410_dma_client s3c64xx_spi_dma_client = {
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.name = "samsung-spi-dma",
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};
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static int s3c64xx_spi_map_mssg(struct s3c64xx_spi_driver_data *sdd,
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struct spi_message *msg)
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{
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struct device *dev = &sdd->pdev->dev;
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struct spi_transfer *xfer;
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if (is_polling(sdd) || msg->is_dma_mapped)
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return 0;
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/* First mark all xfer unmapped */
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list_for_each_entry(xfer, &msg->transfers, transfer_list) {
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xfer->rx_dma = XFER_DMAADDR_INVALID;
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xfer->tx_dma = XFER_DMAADDR_INVALID;
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}
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/* Map until end or first fail */
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list_for_each_entry(xfer, &msg->transfers, transfer_list) {
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if (xfer->len <= ((FIFO_LVL_MASK(sdd) >> 1) + 1))
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continue;
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if (xfer->tx_buf != NULL) {
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xfer->tx_dma = dma_map_single(dev,
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(void *)xfer->tx_buf, xfer->len,
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DMA_TO_DEVICE);
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if (dma_mapping_error(dev, xfer->tx_dma)) {
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dev_err(dev, "dma_map_single Tx failed\n");
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xfer->tx_dma = XFER_DMAADDR_INVALID;
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return -ENOMEM;
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}
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}
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if (xfer->rx_buf != NULL) {
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xfer->rx_dma = dma_map_single(dev, xfer->rx_buf,
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xfer->len, DMA_FROM_DEVICE);
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if (dma_mapping_error(dev, xfer->rx_dma)) {
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dev_err(dev, "dma_map_single Rx failed\n");
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dma_unmap_single(dev, xfer->tx_dma,
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xfer->len, DMA_TO_DEVICE);
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xfer->tx_dma = XFER_DMAADDR_INVALID;
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xfer->rx_dma = XFER_DMAADDR_INVALID;
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return -ENOMEM;
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}
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}
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}
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return 0;
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}
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static void s3c64xx_spi_unmap_mssg(struct s3c64xx_spi_driver_data *sdd,
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struct spi_message *msg)
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{
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struct device *dev = &sdd->pdev->dev;
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struct spi_transfer *xfer;
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if (is_polling(sdd) || msg->is_dma_mapped)
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return;
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list_for_each_entry(xfer, &msg->transfers, transfer_list) {
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if (xfer->len <= ((FIFO_LVL_MASK(sdd) >> 1) + 1))
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continue;
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if (xfer->rx_buf != NULL
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&& xfer->rx_dma != XFER_DMAADDR_INVALID)
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dma_unmap_single(dev, xfer->rx_dma,
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xfer->len, DMA_FROM_DEVICE);
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if (xfer->tx_buf != NULL
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&& xfer->tx_dma != XFER_DMAADDR_INVALID)
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dma_unmap_single(dev, xfer->tx_dma,
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xfer->len, DMA_TO_DEVICE);
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}
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}
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static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
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unsigned len, dma_addr_t buf)
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{
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struct s3c64xx_spi_driver_data *sdd;
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struct samsung_dma_prep info;
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struct samsung_dma_config config;
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if (dma->direction == DMA_DEV_TO_MEM) {
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sdd = container_of((void *)dma,
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struct s3c64xx_spi_driver_data, rx_dma);
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config.direction = sdd->rx_dma.direction;
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config.fifo = sdd->sfr_start + S3C64XX_SPI_RX_DATA;
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config.width = sdd->cur_bpw / 8;
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sdd->ops->config((enum dma_ch)sdd->rx_dma.ch, &config);
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} else {
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sdd = container_of((void *)dma,
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struct s3c64xx_spi_driver_data, tx_dma);
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config.direction = sdd->tx_dma.direction;
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config.fifo = sdd->sfr_start + S3C64XX_SPI_TX_DATA;
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config.width = sdd->cur_bpw / 8;
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sdd->ops->config((enum dma_ch)sdd->tx_dma.ch, &config);
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}
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info.cap = DMA_SLAVE;
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info.len = len;
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info.fp = s3c64xx_spi_dmacb;
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info.fp_param = dma;
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info.direction = dma->direction;
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info.buf = buf;
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sdd->ops->prepare((enum dma_ch)dma->ch, &info);
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sdd->ops->trigger((enum dma_ch)dma->ch);
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}
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static int acquire_dma(struct s3c64xx_spi_driver_data *sdd)
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{
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struct samsung_dma_req req;
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struct device *dev = &sdd->pdev->dev;
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sdd->ops = samsung_dma_get_ops();
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req.cap = DMA_SLAVE;
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req.client = &s3c64xx_spi_dma_client;
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sdd->rx_dma.ch = (struct dma_chan *)(unsigned long)sdd->ops->request(
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sdd->rx_dma.dmach, &req, dev, "rx");
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sdd->tx_dma.ch = (struct dma_chan *)(unsigned long)sdd->ops->request(
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sdd->tx_dma.dmach, &req, dev, "tx");
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return 1;
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}
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static int s3c64xx_spi_prepare_transfer(struct spi_master *spi)
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{
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
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/*
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* If DMA resource was not available during
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* probe, no need to continue with dma requests
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* else Acquire DMA channels
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*/
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while (!is_polling(sdd) && !acquire_dma(sdd))
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usleep_range(10000, 11000);
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return 0;
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}
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static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi)
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{
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
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/* Free DMA channels */
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if (!is_polling(sdd)) {
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sdd->ops->release((enum dma_ch)sdd->rx_dma.ch,
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&s3c64xx_spi_dma_client);
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sdd->ops->release((enum dma_ch)sdd->tx_dma.ch,
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&s3c64xx_spi_dma_client);
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}
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return 0;
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}
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static void s3c64xx_spi_dma_stop(struct s3c64xx_spi_driver_data *sdd,
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struct s3c64xx_spi_dma_data *dma)
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{
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sdd->ops->stop((enum dma_ch)dma->ch);
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}
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#define s3c64xx_spi_can_dma NULL
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#else
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static int s3c64xx_spi_map_mssg(struct s3c64xx_spi_driver_data *sdd,
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struct spi_message *msg)
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{
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@ -583,8 +402,6 @@ static bool s3c64xx_spi_can_dma(struct spi_master *master,
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return xfer->len > (FIFO_LVL_MASK(sdd) >> 1) + 1;
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}
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#endif
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static void enable_datapath(struct s3c64xx_spi_driver_data *sdd,
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struct spi_device *spi,
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struct spi_transfer *xfer, int dma_mode)
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@ -616,11 +433,7 @@ static void enable_datapath(struct s3c64xx_spi_driver_data *sdd,
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chcfg |= S3C64XX_SPI_CH_TXCH_ON;
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if (dma_mode) {
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modecfg |= S3C64XX_SPI_MODE_TXDMA_ON;
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#ifndef CONFIG_S3C_DMA
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prepare_dma(&sdd->tx_dma, &xfer->tx_sg);
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#else
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prepare_dma(&sdd->tx_dma, xfer->len, xfer->tx_dma);
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#endif
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} else {
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switch (sdd->cur_bpw) {
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case 32:
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@ -652,11 +465,7 @@ static void enable_datapath(struct s3c64xx_spi_driver_data *sdd,
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writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
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| S3C64XX_SPI_PACKET_CNT_EN,
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regs + S3C64XX_SPI_PACKET_CNT);
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#ifndef CONFIG_S3C_DMA
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prepare_dma(&sdd->rx_dma, &xfer->rx_sg);
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#else
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prepare_dma(&sdd->rx_dma, xfer->len, xfer->rx_dma);
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#endif
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}
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}
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