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OMAP3 SDRC: Fix freeze when scaling CORE dpll to < 83Mhz
This patch fixes a bug in the CORE dpll scaling sequence which was errouneously clearing some bits in the SDRC DLLA CTRL register and hence causing a freeze. The issue was observed only on platforms which scale CORE dpll to < 83Mhz and hence program the DLL in fixed delay mode. Issue reported by Limei Wang <E12499@motorola.com>, with debugging assistance from Richard Woodruff <r-woodruff2@ti.com> and Girish Ghongdemath <girishsg@ti.com>. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Cc: Limei Wang <E12499@motorola.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Girish Ghongdemath <girishsg@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> [paul@pwsan.com: updated patch description to include collaboration credits]
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@ -143,7 +143,7 @@ return_to_sdram:
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unlock_dll:
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ldr r11, omap3_sdrc_dlla_ctrl
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ldr r12, [r11]
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and r12, r12, #FIXEDDELAY_MASK
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bic r12, r12, #FIXEDDELAY_MASK
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orr r12, r12, #FIXEDDELAY_DEFAULT
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orr r12, r12, #DLLIDLE_MASK
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str r12, [r11] @ (no OCP barrier needed)
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