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Code

ARM: at91: sparse irq support

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Enable sparse irq support for multisoc image. It involves to add the
NR_IRQS_LEGACY offset to static SoC irq number definitions since NR_IRQS_LEGACY
irq descs are allocated before AIC requests irq descs allocation.
Move NR_AIC_IRQS macro to a more appropiate place with the purpose to
remove mach/irqs.h later.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
Ludovic Desroches 2012-06-21 14:47:27 +02:00 committed by Nicolas Ferre
parent 3e13546674
commit 8fe82a5550
19 changed files with 271 additions and 269 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/mach-at91/Kconfig
View File

@ -30,6 +30,7 @@ config SOC_AT91SAM9
bool
select CPU_ARM926T
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
select AT91_SAM9_TIME
select AT91_SAM9_SMC

1
arch/arm/mach-at91/at91rm9200.c
View File

@ -17,6 +17,7 @@
#include <asm/mach/map.h>
#include <asm/system_misc.h>
#include <mach/at91rm9200.h>
#include <mach/at91_aic.h>
#include <mach/at91_pmc.h>
#include <mach/at91_st.h>
#include <mach/cpu.h>

84
arch/arm/mach-at91/at91rm9200_devices.c
View File

@ -41,8 +41,8 @@ static struct resource usbh_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_UHP,
.end = AT91RM9200_ID_UHP,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
.flags = IORESOURCE_IRQ,
},
};
@ -94,8 +94,8 @@ static struct resource udc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_UDP,
.end = AT91RM9200_ID_UDP,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
.flags = IORESOURCE_IRQ,
},
};
@ -145,8 +145,8 @@ static struct resource eth_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_EMAC,
.end = AT91RM9200_ID_EMAC,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
.flags = IORESOURCE_IRQ,
},
};
@ -305,8 +305,8 @@ static struct resource mmc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_MCI,
.end = AT91RM9200_ID_MCI,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
.flags = IORESOURCE_IRQ,
},
};
@ -488,8 +488,8 @@ static struct resource twi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_TWI,
.end = AT91RM9200_ID_TWI,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
.flags = IORESOURCE_IRQ,
},
};
@ -532,8 +532,8 @@ static struct resource spi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_SPI,
.end = AT91RM9200_ID_SPI,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
.flags = IORESOURCE_IRQ,
},
};
@ -598,18 +598,18 @@ static struct resource tcb0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_TC0,
.end = AT91RM9200_ID_TC0,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = AT91RM9200_ID_TC1,
.end = AT91RM9200_ID_TC1,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = AT91RM9200_ID_TC2,
.end = AT91RM9200_ID_TC2,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
.flags = IORESOURCE_IRQ,
},
};
@ -628,18 +628,18 @@ static struct resource tcb1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_TC3,
.end = AT91RM9200_ID_TC3,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = AT91RM9200_ID_TC4,
.end = AT91RM9200_ID_TC4,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = AT91RM9200_ID_TC5,
.end = AT91RM9200_ID_TC5,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
.flags = IORESOURCE_IRQ,
},
};
@ -673,8 +673,8 @@ static struct resource rtc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.start = NR_IRQS_LEGACY + AT91_ID_SYS,
.end = NR_IRQS_LEGACY + AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
@ -729,8 +729,8 @@ static struct resource ssc0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_SSC0,
.end = AT91RM9200_ID_SSC0,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
.flags = IORESOURCE_IRQ,
},
};
@ -771,8 +771,8 @@ static struct resource ssc1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_SSC1,
.end = AT91RM9200_ID_SSC1,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
.flags = IORESOURCE_IRQ,
},
};
@ -813,8 +813,8 @@ static struct resource ssc2_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_SSC2,
.end = AT91RM9200_ID_SSC2,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
.flags = IORESOURCE_IRQ,
},
};
@ -897,8 +897,8 @@ static struct resource dbgu_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.start = NR_IRQS_LEGACY + AT91_ID_SYS,
.end = NR_IRQS_LEGACY + AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
@ -935,8 +935,8 @@ static struct resource uart0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_US0,
.end = AT91RM9200_ID_US0,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
@ -984,8 +984,8 @@ static struct resource uart1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_US1,
.end = AT91RM9200_ID_US1,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
@ -1035,8 +1035,8 @@ static struct resource uart2_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_US2,
.end = AT91RM9200_ID_US2,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
.flags = IORESOURCE_IRQ,
},
};
@ -1078,8 +1078,8 @@ static struct resource uart3_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91RM9200_ID_US3,
.end = AT91RM9200_ID_US3,
.start = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
.end = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
.flags = IORESOURCE_IRQ,
},
};

1
arch/arm/mach-at91/at91sam9260.c
View File

@ -20,6 +20,7 @@
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>
#include <mach/at91sam9260.h>
#include <mach/at91_aic.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>

92
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -45,8 +45,8 @@ static struct resource usbh_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_UHP,
.end = AT91SAM9260_ID_UHP,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
.flags = IORESOURCE_IRQ,
},
};
@ -98,8 +98,8 @@ static struct resource udc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_UDP,
.end = AT91SAM9260_ID_UDP,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
.flags = IORESOURCE_IRQ,
},
};
@ -149,8 +149,8 @@ static struct resource eth_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_EMAC,
.end = AT91SAM9260_ID_EMAC,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
.flags = IORESOURCE_IRQ,
},
};
@ -223,8 +223,8 @@ static struct resource mmc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_MCI,
.end = AT91SAM9260_ID_MCI,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
.flags = IORESOURCE_IRQ,
},
};
@ -305,8 +305,8 @@ static struct resource mmc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_MCI,
.end = AT91SAM9260_ID_MCI,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
.flags = IORESOURCE_IRQ,
},
};
@ -496,8 +496,8 @@ static struct resource twi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_TWI,
.end = AT91SAM9260_ID_TWI,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
.flags = IORESOURCE_IRQ,
},
};
@ -540,8 +540,8 @@ static struct resource spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_SPI0,
.end = AT91SAM9260_ID_SPI0,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
.flags = IORESOURCE_IRQ,
},
};
@ -566,8 +566,8 @@ static struct resource spi1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_SPI1,
.end = AT91SAM9260_ID_SPI1,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
.flags = IORESOURCE_IRQ,
},
};
@ -652,18 +652,18 @@ static struct resource tcb0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_TC0,
.end = AT91SAM9260_ID_TC0,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = AT91SAM9260_ID_TC1,
.end = AT91SAM9260_ID_TC1,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = AT91SAM9260_ID_TC2,
.end = AT91SAM9260_ID_TC2,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
.flags = IORESOURCE_IRQ,
},
};
@ -682,18 +682,18 @@ static struct resource tcb1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_TC3,
.end = AT91SAM9260_ID_TC3,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = AT91SAM9260_ID_TC4,
.end = AT91SAM9260_ID_TC4,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = AT91SAM9260_ID_TC5,
.end = AT91SAM9260_ID_TC5,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
.flags = IORESOURCE_IRQ,
},
};
@ -807,8 +807,8 @@ static struct resource ssc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_SSC,
.end = AT91SAM9260_ID_SSC,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
.flags = IORESOURCE_IRQ,
},
};
@ -882,8 +882,8 @@ static struct resource dbgu_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.start = NR_IRQS_LEGACY + AT91_ID_SYS,
.end = NR_IRQS_LEGACY + AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
@ -920,8 +920,8 @@ static struct resource uart0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US0,
.end = AT91SAM9260_ID_US0,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
@ -971,8 +971,8 @@ static struct resource uart1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US1,
.end = AT91SAM9260_ID_US1,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
@ -1014,8 +1014,8 @@ static struct resource uart2_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US2,
.end = AT91SAM9260_ID_US2,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
.flags = IORESOURCE_IRQ,
},
};
@ -1057,8 +1057,8 @@ static struct resource uart3_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US3,
.end = AT91SAM9260_ID_US3,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
.flags = IORESOURCE_IRQ,
},
};
@ -1100,8 +1100,8 @@ static struct resource uart4_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US4,
.end = AT91SAM9260_ID_US4,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
.flags = IORESOURCE_IRQ,
},
};
@ -1138,8 +1138,8 @@ static struct resource uart5_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_US5,
.end = AT91SAM9260_ID_US5,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
.flags = IORESOURCE_IRQ,
},
};
@ -1357,8 +1357,8 @@ static struct resource adc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9260_ID_ADC,
.end = AT91SAM9260_ID_ADC,
.start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
.end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
.flags = IORESOURCE_IRQ,
},
};

1
arch/arm/mach-at91/at91sam9261.c
View File

@ -19,6 +19,7 @@
#include <asm/system_misc.h>
#include <mach/cpu.h>
#include <mach/at91sam9261.h>
#include <mach/at91_aic.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>

68
arch/arm/mach-at91/at91sam9261_devices.c
View File

@ -45,8 +45,8 @@ static struct resource usbh_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_UHP,
.end = AT91SAM9261_ID_UHP,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
.flags = IORESOURCE_IRQ,
},
};
@ -98,8 +98,8 @@ static struct resource udc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_UDP,
.end = AT91SAM9261_ID_UDP,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
.flags = IORESOURCE_IRQ,
},
};
@ -148,8 +148,8 @@ static struct resource mmc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_MCI,
.end = AT91SAM9261_ID_MCI,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
.flags = IORESOURCE_IRQ,
},
};
@ -310,8 +310,8 @@ static struct resource twi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_TWI,
.end = AT91SAM9261_ID_TWI,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
.flags = IORESOURCE_IRQ,
},
};
@ -354,8 +354,8 @@ static struct resource spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_SPI0,
.end = AT91SAM9261_ID_SPI0,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
.flags = IORESOURCE_IRQ,
},
};
@ -380,8 +380,8 @@ static struct resource spi1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_SPI1,
.end = AT91SAM9261_ID_SPI1,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
.flags = IORESOURCE_IRQ,
},
};
@ -468,8 +468,8 @@ static struct resource lcdc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_LCDC,
.end = AT91SAM9261_ID_LCDC,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
.flags = IORESOURCE_IRQ,
},
#if defined(CONFIG_FB_INTSRAM)
@ -566,18 +566,18 @@ static struct resource tcb_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_TC0,
.end = AT91SAM9261_ID_TC0,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = AT91SAM9261_ID_TC1,
.end = AT91SAM9261_ID_TC1,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = AT91SAM9261_ID_TC2,
.end = AT91SAM9261_ID_TC2,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
.flags = IORESOURCE_IRQ,
},
};
@ -689,8 +689,8 @@ static struct resource ssc0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_SSC0,
.end = AT91SAM9261_ID_SSC0,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
.flags = IORESOURCE_IRQ,
},
};
@ -731,8 +731,8 @@ static struct resource ssc1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_SSC1,
.end = AT91SAM9261_ID_SSC1,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
.flags = IORESOURCE_IRQ,
},
};
@ -773,8 +773,8 @@ static struct resource ssc2_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_SSC2,
.end = AT91SAM9261_ID_SSC2,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
.flags = IORESOURCE_IRQ,
},
};
@ -857,8 +857,8 @@ static struct resource dbgu_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.start = NR_IRQS_LEGACY + AT91_ID_SYS,
.end = NR_IRQS_LEGACY + AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
@ -895,8 +895,8 @@ static struct resource uart0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_US0,
.end = AT91SAM9261_ID_US0,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
@ -938,8 +938,8 @@ static struct resource uart1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_US1,
.end = AT91SAM9261_ID_US1,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
@ -981,8 +981,8 @@ static struct resource uart2_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9261_ID_US2,
.end = AT91SAM9261_ID_US2,
.start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
.end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
.flags = IORESOURCE_IRQ,
},
};

1
arch/arm/mach-at91/at91sam9263.c
View File

@ -18,6 +18,7 @@
#include <asm/mach/map.h>
#include <asm/system_misc.h>
#include <mach/at91sam9263.h>
#include <mach/at91_aic.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>

80
arch/arm/mach-at91/at91sam9263_devices.c
View File

@ -44,8 +44,8 @@ static struct resource usbh_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_UHP,
.end = AT91SAM9263_ID_UHP,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
.flags = IORESOURCE_IRQ,
},
};
@ -104,8 +104,8 @@ static struct resource udc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_UDP,
.end = AT91SAM9263_ID_UDP,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
.flags = IORESOURCE_IRQ,
},
};
@ -155,8 +155,8 @@ static struct resource eth_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_EMAC,
.end = AT91SAM9263_ID_EMAC,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
.flags = IORESOURCE_IRQ,
},
};
@ -229,8 +229,8 @@ static struct resource mmc0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_MCI0,
.end = AT91SAM9263_ID_MCI0,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
.flags = IORESOURCE_IRQ,
},
};
@ -254,8 +254,8 @@ static struct resource mmc1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_MCI1,
.end = AT91SAM9263_ID_MCI1,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
.flags = IORESOURCE_IRQ,
},
};
@ -567,8 +567,8 @@ static struct resource twi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_TWI,
.end = AT91SAM9263_ID_TWI,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
.flags = IORESOURCE_IRQ,
},
};
@ -611,8 +611,8 @@ static struct resource spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_SPI0,
.end = AT91SAM9263_ID_SPI0,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
.flags = IORESOURCE_IRQ,
},
};
@ -637,8 +637,8 @@ static struct resource spi1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_SPI1,
.end = AT91SAM9263_ID_SPI1,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
.flags = IORESOURCE_IRQ,
},
};
@ -725,8 +725,8 @@ static struct resource ac97_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_AC97C,
.end = AT91SAM9263_ID_AC97C,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
.flags = IORESOURCE_IRQ,
},
};
@ -776,8 +776,8 @@ static struct resource can_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_CAN,
.end = AT91SAM9263_ID_CAN,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
.flags = IORESOURCE_IRQ,
},
};
@ -816,8 +816,8 @@ static struct resource lcdc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_LCDC,
.end = AT91SAM9263_ID_LCDC,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
.flags = IORESOURCE_IRQ,
},
};
@ -883,8 +883,8 @@ struct resource isi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_ISI,
.end = AT91SAM9263_ID_ISI,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
.flags = IORESOURCE_IRQ,
},
};
@ -940,8 +940,8 @@ static struct resource tcb_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_TCB,
.end = AT91SAM9263_ID_TCB,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
.flags = IORESOURCE_IRQ,
},
};
@ -1108,8 +1108,8 @@ static struct resource pwm_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_PWMC,
.end = AT91SAM9263_ID_PWMC,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
.flags = IORESOURCE_IRQ,
},
};
@ -1161,8 +1161,8 @@ static struct resource ssc0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_SSC0,
.end = AT91SAM9263_ID_SSC0,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
.flags = IORESOURCE_IRQ,
},
};
@ -1203,8 +1203,8 @@ static struct resource ssc1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_SSC1,
.end = AT91SAM9263_ID_SSC1,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
.flags = IORESOURCE_IRQ,
},
};
@ -1284,8 +1284,8 @@ static struct resource dbgu_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.start = NR_IRQS_LEGACY + AT91_ID_SYS,
.end = NR_IRQS_LEGACY + AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
@ -1322,8 +1322,8 @@ static struct resource uart0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_US0,
.end = AT91SAM9263_ID_US0,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
@ -1365,8 +1365,8 @@ static struct resource uart1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_US1,
.end = AT91SAM9263_ID_US1,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
@ -1408,8 +1408,8 @@ static struct resource uart2_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9263_ID_US2,
.end = AT91SAM9263_ID_US2,
.start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
.end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
.flags = IORESOURCE_IRQ,
},
};

2
arch/arm/mach-at91/at91sam926x_time.c
View File

@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = {
.name = "at91_tick",
.flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
.handler = at91sam926x_pit_interrupt,
.irq = AT91_ID_SYS,
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
};
static void at91sam926x_pit_reset(void)

1
arch/arm/mach-at91/at91sam9g45.c
View File

@ -18,6 +18,7 @@
#include <asm/mach/map.h>
#include <asm/system_misc.h>
#include <mach/at91sam9g45.h>
#include <mach/at91_aic.h>
#include <mach/at91_pmc.h>
#include <mach/cpu.h>

108
arch/arm/mach-at91/at91sam9g45_devices.c
View File

@ -53,8 +53,8 @@ static struct resource hdmac_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_DMA,
.end = AT91SAM9G45_ID_DMA,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
.flags = IORESOURCE_IRQ,
},
};
@ -94,8 +94,8 @@ static struct resource usbh_ohci_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_UHPHS,
.end = AT91SAM9G45_ID_UHPHS,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
.flags = IORESOURCE_IRQ,
},
};
@ -156,8 +156,8 @@ static struct resource usbh_ehci_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_UHPHS,
.end = AT91SAM9G45_ID_UHPHS,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
.flags = IORESOURCE_IRQ,
},
};
@ -213,8 +213,8 @@ static struct resource usba_udc_resources[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
.start = AT91SAM9G45_ID_UDPHS,
.end = AT91SAM9G45_ID_UDPHS,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
.flags = IORESOURCE_IRQ,
},
};
@ -296,8 +296,8 @@ static struct resource eth_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_EMAC,
.end = AT91SAM9G45_ID_EMAC,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
.flags = IORESOURCE_IRQ,
},
};
@ -370,8 +370,8 @@ static struct resource mmc0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_MCI0,
.end = AT91SAM9G45_ID_MCI0,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
.flags = IORESOURCE_IRQ,
},
};
@ -395,8 +395,8 @@ static struct resource mmc1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_MCI1,
.end = AT91SAM9G45_ID_MCI1,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
.flags = IORESOURCE_IRQ,
},
};
@ -645,8 +645,8 @@ static struct resource twi0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_TWI0,
.end = AT91SAM9G45_ID_TWI0,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
.flags = IORESOURCE_IRQ,
},
};
@ -665,8 +665,8 @@ static struct resource twi1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_TWI1,
.end = AT91SAM9G45_ID_TWI1,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
.flags = IORESOURCE_IRQ,
},
};
@ -720,8 +720,8 @@ static struct resource spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_SPI0,
.end = AT91SAM9G45_ID_SPI0,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
.flags = IORESOURCE_IRQ,
},
};
@ -746,8 +746,8 @@ static struct resource spi1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_SPI1,
.end = AT91SAM9G45_ID_SPI1,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
.flags = IORESOURCE_IRQ,
},
};
@ -834,8 +834,8 @@ static struct resource ac97_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_AC97C,
.end = AT91SAM9G45_ID_AC97C,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
.flags = IORESOURCE_IRQ,
},
};
@ -887,8 +887,8 @@ struct resource isi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_ISI,
.end = AT91SAM9G45_ID_ISI,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
.flags = IORESOURCE_IRQ,
},
};
@ -979,8 +979,8 @@ static struct resource lcdc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_LCDC,
.end = AT91SAM9G45_ID_LCDC,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
.flags = IORESOURCE_IRQ,
},
};
@ -1054,8 +1054,8 @@ static struct resource tcb0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_TCB,
.end = AT91SAM9G45_ID_TCB,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
.flags = IORESOURCE_IRQ,
},
};
@ -1075,8 +1075,8 @@ static struct resource tcb1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_TCB,
.end = AT91SAM9G45_ID_TCB,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
.flags = IORESOURCE_IRQ,
},
};
@ -1110,8 +1110,8 @@ static struct resource rtc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.start = NR_IRQS_LEGACY + AT91_ID_SYS,
.end = NR_IRQS_LEGACY + AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
@ -1147,8 +1147,8 @@ static struct resource tsadcc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_TSC,
.end = AT91SAM9G45_ID_TSC,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
.flags = IORESOURCE_IRQ,
}
};
@ -1197,8 +1197,8 @@ static struct resource adc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_TSC,
.end = AT91SAM9G45_ID_TSC,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
.flags = IORESOURCE_IRQ,
}
};
@ -1400,8 +1400,8 @@ static struct resource pwm_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_PWMC,
.end = AT91SAM9G45_ID_PWMC,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
.flags = IORESOURCE_IRQ,
},
};
@ -1453,8 +1453,8 @@ static struct resource ssc0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_SSC0,
.end = AT91SAM9G45_ID_SSC0,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
.flags = IORESOURCE_IRQ,
},
};
@ -1495,8 +1495,8 @@ static struct resource ssc1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_SSC1,
.end = AT91SAM9G45_ID_SSC1,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
.flags = IORESOURCE_IRQ,
},
};
@ -1575,8 +1575,8 @@ static struct resource dbgu_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.start = NR_IRQS_LEGACY + AT91_ID_SYS,
.end = NR_IRQS_LEGACY + AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
@ -1613,8 +1613,8 @@ static struct resource uart0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_US0,
.end = AT91SAM9G45_ID_US0,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
@ -1656,8 +1656,8 @@ static struct resource uart1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_US1,
.end = AT91SAM9G45_ID_US1,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
@ -1699,8 +1699,8 @@ static struct resource uart2_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_US2,
.end = AT91SAM9G45_ID_US2,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
.flags = IORESOURCE_IRQ,
},
};
@ -1742,8 +1742,8 @@ static struct resource uart3_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_US3,
.end = AT91SAM9G45_ID_US3,
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
.flags = IORESOURCE_IRQ,
},
};

1
arch/arm/mach-at91/at91sam9rl.c
View File

@ -19,6 +19,7 @@
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>
#include <mach/at91sam9rl.h>
#include <mach/at91_aic.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>

76
arch/arm/mach-at91/at91sam9rl_devices.c
View File

@ -41,8 +41,8 @@ static struct resource hdmac_resources[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
.start = AT91SAM9RL_ID_DMA,
.end = AT91SAM9RL_ID_DMA,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
.flags = IORESOURCE_IRQ,
},
};
@ -84,8 +84,8 @@ static struct resource usba_udc_resources[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
.start = AT91SAM9RL_ID_UDPHS,
.end = AT91SAM9RL_ID_UDPHS,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
.flags = IORESOURCE_IRQ,
},
};
@ -172,8 +172,8 @@ static struct resource mmc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_MCI,
.end = AT91SAM9RL_ID_MCI,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
.flags = IORESOURCE_IRQ,
},
};
@ -339,8 +339,8 @@ static struct resource twi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_TWI0,
.end = AT91SAM9RL_ID_TWI0,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
.flags = IORESOURCE_IRQ,
},
};
@ -383,8 +383,8 @@ static struct resource spi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_SPI,
.end = AT91SAM9RL_ID_SPI,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
.flags = IORESOURCE_IRQ,
},
};
@ -452,8 +452,8 @@ static struct resource ac97_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_AC97C,
.end = AT91SAM9RL_ID_AC97C,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
.flags = IORESOURCE_IRQ,
},
};
@ -507,8 +507,8 @@ static struct resource lcdc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_LCDC,
.end = AT91SAM9RL_ID_LCDC,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
.flags = IORESOURCE_IRQ,
},
};
@ -574,18 +574,18 @@ static struct resource tcb_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_TC0,
.end = AT91SAM9RL_ID_TC0,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = AT91SAM9RL_ID_TC1,
.end = AT91SAM9RL_ID_TC1,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = AT91SAM9RL_ID_TC2,
.end = AT91SAM9RL_ID_TC2,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
.flags = IORESOURCE_IRQ,
},
};
@ -621,8 +621,8 @@ static struct resource tsadcc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_TSC,
.end = AT91SAM9RL_ID_TSC,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
.flags = IORESOURCE_IRQ,
}
};
@ -768,8 +768,8 @@ static struct resource pwm_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_PWMC,
.end = AT91SAM9RL_ID_PWMC,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
.flags = IORESOURCE_IRQ,
},
};
@ -821,8 +821,8 @@ static struct resource ssc0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_SSC0,
.end = AT91SAM9RL_ID_SSC0,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
.flags = IORESOURCE_IRQ,
},
};
@ -863,8 +863,8 @@ static struct resource ssc1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_SSC1,
.end = AT91SAM9RL_ID_SSC1,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
.flags = IORESOURCE_IRQ,
},
};
@ -943,8 +943,8 @@ static struct resource dbgu_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.start = NR_IRQS_LEGACY + AT91_ID_SYS,
.end = NR_IRQS_LEGACY + AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
@ -981,8 +981,8 @@ static struct resource uart0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_US0,
.end = AT91SAM9RL_ID_US0,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
@ -1032,8 +1032,8 @@ static struct resource uart1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_US1,
.end = AT91SAM9RL_ID_US1,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
@ -1075,8 +1075,8 @@ static struct resource uart2_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_US2,
.end = AT91SAM9RL_ID_US2,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
.flags = IORESOURCE_IRQ,
},
};
@ -1118,8 +1118,8 @@ static struct resource uart3_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_US3,
.end = AT91SAM9RL_ID_US3,
.start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
.end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
.flags = IORESOURCE_IRQ,
},
};

1
arch/arm/mach-at91/at91x40.c
View File

@ -17,6 +17,7 @@
#include <asm/system_misc.h>
#include <asm/mach/arch.h>
#include <mach/at91x40.h>
#include <mach/at91_aic.h>
#include <mach/at91_st.h>
#include <mach/timex.h>
#include "generic.h"

3
arch/arm/mach-at91/include/mach/at91_aic.h
View File

@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base;
.extern at91_aic_base
#endif
/* Number of irq lines managed by AIC */
#define NR_AIC_IRQS 32
#define AT91_AIC_IRQ_MIN_PRIORITY 0
#define AT91_AIC_IRQ_MAX_PRIORITY 7

12
arch/arm/mach-at91/include/mach/irqs.h
View File

@ -22,18 +22,6 @@
#define __ASM_ARCH_IRQS_H
#include <linux/io.h>
#include <mach/at91_aic.h>
#define NR_AIC_IRQS 32
/*
* IRQ interrupt symbols are the AT91xxx_ID_* symbols
* for IRQs handled directly through the AIC, or else the AT91_PIN_*
* symbols in gpio.h for ones handled indirectly as GPIOs.
* We make provision for 5 banks of GPIO.
*/
#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
/* FIQ is AIC source 0. */
#define FIQ_START AT91_ID_FIQ

6
arch/arm/mach-at91/irq.c
View File

@ -41,6 +41,8 @@
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include <mach/at91_aic.h>
void __iomem *at91_aic_base;
static struct irq_domain *at91_aic_domain;
static struct device_node *at91_aic_np;
@ -302,11 +304,11 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
*/
for (i = 0; i < NR_AIC_IRQS; i++) {
/* Put hardware irq number in Source Vector Register: */
at91_aic_write(AT91_AIC_SVR(i), i);
at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i);
/* Active Low interrupt, with the specified priority */
at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
irq_set_chip_and_handler(i, &at91_aic_chip, handle_fasteoi_irq);
irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}

1
arch/arm/mach-at91/pm.c
View File

@ -25,6 +25,7 @@
#include <asm/mach/time.h>
#include <asm/mach/irq.h>
#include <mach/at91_aic.h>
#include <mach/at91_pmc.h>
#include <mach/cpu.h>