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drm/i915/bdw: Fix DP_AUX_CH_CTL_TIME_OUT setting
Per BSpec, 400us is "BDW+ Do not use this setting." - not just PORT_A. Set BDW to 600us unconditionally. v2: -Split in to two patches (Rodrigo) Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: James Ausmus <james.ausmus@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171012213037.4245-2-james.ausmus@intel.com
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@ -1007,7 +1007,7 @@ static uint32_t g4x_get_aux_send_ctl(struct intel_dp *intel_dp,
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else
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precharge = 5;
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if (IS_BROADWELL(dev_priv) && intel_dig_port->port == PORT_A)
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if (IS_BROADWELL(dev_priv))
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timeout = DP_AUX_CH_CTL_TIME_OUT_600us;
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else
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timeout = DP_AUX_CH_CTL_TIME_OUT_400us;
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