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mlxsw: reg: Generare register names automatically
Extend the MLXSW_REG_DEFINE macro to store register name in string form. Use this string later on instead of hard coded string values. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Acked-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Jiri Pirko
David S. Miller
parent
21978dcfc8
commit
8e9658d567
@ -48,12 +48,14 @@
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struct mlxsw_reg_info {
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u16 id;
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u16 len; /* In u8 */
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const char *name;
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};
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#define MLXSW_REG_DEFINE(_name, _id, _len) \
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static const struct mlxsw_reg_info mlxsw_reg_##_name = { \
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.id = _id, \
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.len = _len, \
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.name = #_name, \
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}
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#define MLXSW_REG(type) (&mlxsw_reg_##type)
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@ -5082,132 +5084,80 @@ static inline void mlxsw_reg_sbib_pack(char *payload, u8 local_port,
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mlxsw_reg_sbib_buff_size_set(payload, buff_size);
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}
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static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(sgcr),
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MLXSW_REG(spad),
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MLXSW_REG(smid),
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MLXSW_REG(sspr),
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MLXSW_REG(sfdat),
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MLXSW_REG(sfd),
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MLXSW_REG(sfn),
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MLXSW_REG(spms),
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MLXSW_REG(spvid),
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MLXSW_REG(spvm),
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MLXSW_REG(spaft),
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MLXSW_REG(sfgc),
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MLXSW_REG(sftr),
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MLXSW_REG(sfdf),
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MLXSW_REG(sldr),
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MLXSW_REG(slcr),
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MLXSW_REG(slcor),
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MLXSW_REG(spmlr),
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MLXSW_REG(svfa),
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MLXSW_REG(svpe),
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MLXSW_REG(sfmr),
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MLXSW_REG(spvmlr),
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MLXSW_REG(qtct),
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MLXSW_REG(qeec),
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MLXSW_REG(pmlp),
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MLXSW_REG(pmtu),
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MLXSW_REG(ptys),
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MLXSW_REG(ppad),
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MLXSW_REG(paos),
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MLXSW_REG(pfcc),
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MLXSW_REG(ppcnt),
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MLXSW_REG(pptb),
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MLXSW_REG(pbmc),
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MLXSW_REG(pspa),
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MLXSW_REG(htgt),
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MLXSW_REG(hpkt),
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MLXSW_REG(rgcr),
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MLXSW_REG(ritr),
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MLXSW_REG(ratr),
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MLXSW_REG(ralta),
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MLXSW_REG(ralst),
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MLXSW_REG(raltb),
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MLXSW_REG(ralue),
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MLXSW_REG(rauht),
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MLXSW_REG(raleu),
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MLXSW_REG(rauhtd),
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MLXSW_REG(mfcr),
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MLXSW_REG(mfsc),
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MLXSW_REG(mfsm),
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MLXSW_REG(mtcap),
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MLXSW_REG(mtmp),
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MLXSW_REG(mpat),
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MLXSW_REG(mpar),
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MLXSW_REG(mlcr),
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MLXSW_REG(sbpr),
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MLXSW_REG(sbcm),
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MLXSW_REG(sbpm),
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MLXSW_REG(sbmm),
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MLXSW_REG(sbsr),
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MLXSW_REG(sbib),
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};
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static inline const char *mlxsw_reg_id_str(u16 reg_id)
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{
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switch (reg_id) {
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case MLXSW_REG_SGCR_ID:
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return "SGCR";
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case MLXSW_REG_SPAD_ID:
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return "SPAD";
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case MLXSW_REG_SMID_ID:
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return "SMID";
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case MLXSW_REG_SSPR_ID:
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return "SSPR";
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case MLXSW_REG_SFDAT_ID:
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return "SFDAT";
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case MLXSW_REG_SFD_ID:
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return "SFD";
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case MLXSW_REG_SFN_ID:
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return "SFN";
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case MLXSW_REG_SPMS_ID:
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return "SPMS";
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case MLXSW_REG_SPVID_ID:
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return "SPVID";
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case MLXSW_REG_SPVM_ID:
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return "SPVM";
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case MLXSW_REG_SPAFT_ID:
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return "SPAFT";
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case MLXSW_REG_SFGC_ID:
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return "SFGC";
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case MLXSW_REG_SFTR_ID:
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return "SFTR";
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case MLXSW_REG_SFDF_ID:
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return "SFDF";
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case MLXSW_REG_SLDR_ID:
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return "SLDR";
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case MLXSW_REG_SLCR_ID:
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return "SLCR";
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case MLXSW_REG_SLCOR_ID:
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return "SLCOR";
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case MLXSW_REG_SPMLR_ID:
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return "SPMLR";
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case MLXSW_REG_SVFA_ID:
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return "SVFA";
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case MLXSW_REG_SVPE_ID:
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return "SVPE";
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case MLXSW_REG_SFMR_ID:
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return "SFMR";
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case MLXSW_REG_SPVMLR_ID:
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return "SPVMLR";
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case MLXSW_REG_QTCT_ID:
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return "QTCT";
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case MLXSW_REG_QEEC_ID:
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return "QEEC";
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case MLXSW_REG_PMLP_ID:
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return "PMLP";
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case MLXSW_REG_PMTU_ID:
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return "PMTU";
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case MLXSW_REG_PTYS_ID:
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return "PTYS";
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case MLXSW_REG_PPAD_ID:
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return "PPAD";
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case MLXSW_REG_PAOS_ID:
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return "PAOS";
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case MLXSW_REG_PFCC_ID:
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return "PFCC";
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case MLXSW_REG_PPCNT_ID:
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return "PPCNT";
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case MLXSW_REG_PPTB_ID:
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return "PPTB";
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case MLXSW_REG_PBMC_ID:
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return "PBMC";
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case MLXSW_REG_PSPA_ID:
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return "PSPA";
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case MLXSW_REG_HTGT_ID:
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return "HTGT";
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case MLXSW_REG_HPKT_ID:
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return "HPKT";
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case MLXSW_REG_RGCR_ID:
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return "RGCR";
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case MLXSW_REG_RITR_ID:
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return "RITR";
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case MLXSW_REG_RATR_ID:
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return "RATR";
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case MLXSW_REG_RALTA_ID:
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return "RALTA";
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case MLXSW_REG_RALST_ID:
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return "RALST";
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case MLXSW_REG_RALTB_ID:
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return "RALTB";
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case MLXSW_REG_RALUE_ID:
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return "RALUE";
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case MLXSW_REG_RAUHT_ID:
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return "RAUHT";
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case MLXSW_REG_RALEU_ID:
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return "RALEU";
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case MLXSW_REG_RAUHTD_ID:
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return "RAUHTD";
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case MLXSW_REG_MFCR_ID:
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return "MFCR";
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case MLXSW_REG_MFSC_ID:
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return "MFSC";
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case MLXSW_REG_MFSM_ID:
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return "MFSM";
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case MLXSW_REG_MTCAP_ID:
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return "MTCAP";
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case MLXSW_REG_MPAT_ID:
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return "MPAT";
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case MLXSW_REG_MPAR_ID:
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return "MPAR";
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case MLXSW_REG_MTMP_ID:
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return "MTMP";
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case MLXSW_REG_MLCR_ID:
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return "MLCR";
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case MLXSW_REG_SBPR_ID:
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return "SBPR";
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case MLXSW_REG_SBCM_ID:
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return "SBCM";
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case MLXSW_REG_SBPM_ID:
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return "SBPM";
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case MLXSW_REG_SBMM_ID:
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return "SBMM";
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case MLXSW_REG_SBSR_ID:
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return "SBSR";
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case MLXSW_REG_SBIB_ID:
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return "SBIB";
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default:
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return "*UNKNOWN*";
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const struct mlxsw_reg_info *reg_info;
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int i;
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for (i = 0; i < ARRAY_SIZE(mlxsw_reg_infos); i++) {
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reg_info = mlxsw_reg_infos[i];
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if (reg_info->id == reg_id)
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return reg_info->name;
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}
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return "*UNKNOWN*";
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}
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/* PUDE - Port Up / Down Event
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