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https://github.com/edk2-porting/linux-next.git
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iwlwifi: dbg_ini: implement Rx fifos dump
Implement Rx fifos dump in the new dump mechanism. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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@ -1279,6 +1279,105 @@ out:
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return sizeof(*range) + le32_to_cpu(range->range_data_size);
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return sizeof(*range) + le32_to_cpu(range->range_data_size);
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}
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}
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struct iwl_ini_rxf_data {
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u32 fifo_num;
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u32 size;
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u32 offset;
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};
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static void iwl_ini_get_rxf_data(struct iwl_fw_runtime *fwrt,
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struct iwl_fw_ini_region_cfg *reg,
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struct iwl_ini_rxf_data *data)
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{
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u32 fid1 = le32_to_cpu(reg->fifos.fid1);
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u32 fid2 = le32_to_cpu(reg->fifos.fid2);
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u32 fifo_idx;
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if (!data)
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return;
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memset(data, 0, sizeof(*data));
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if (WARN_ON_ONCE((fid1 && fid2) || (!fid1 && !fid2)))
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return;
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fifo_idx = ffs(fid1) - 1;
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if (fid1 && !WARN_ON_ONCE((~BIT(fifo_idx) & fid1) ||
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fifo_idx >= MAX_NUM_LMAC)) {
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data->size = fwrt->smem_cfg.lmac[fifo_idx].rxfifo1_size;
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data->fifo_num = fifo_idx;
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return;
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}
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fifo_idx = ffs(fid2) - 1;
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if (fid2 && !WARN_ON_ONCE(fifo_idx != 0)) {
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data->size = fwrt->smem_cfg.rxfifo2_size;
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data->offset = RXF_DIFF_FROM_PREV;
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/* use bit 31 to distinguish between umac and lmac rxf while
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* parsing the dump
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*/
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data->fifo_num = fifo_idx | IWL_RXF_UMAC_BIT;
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return;
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}
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}
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static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt,
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struct iwl_fw_ini_region_cfg *reg,
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void *range_ptr, int idx)
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{
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struct iwl_fw_ini_fifo_error_dump_range *range = range_ptr;
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struct iwl_ini_rxf_data rxf_data;
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u32 offs = le32_to_cpu(reg->offset), addr;
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u32 registers_size =
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le32_to_cpu(reg->fifos.num_of_registers) * sizeof(__le32);
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__le32 *val = range->data;
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unsigned long flags;
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int i;
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iwl_ini_get_rxf_data(fwrt, reg, &rxf_data);
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if (!rxf_data.size)
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return -EIO;
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if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
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return -EBUSY;
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offs += rxf_data.offset;
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range->fifo_num = cpu_to_le32(rxf_data.fifo_num);
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range->num_of_registers = reg->fifos.num_of_registers;
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range->range_data_size = cpu_to_le32(rxf_data.size + registers_size);
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/* read rxf registers */
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for (i = 0; i < le32_to_cpu(reg->fifos.num_of_registers); i++) {
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addr = le32_to_cpu(reg->start_addr[i]) + offs;
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*val++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
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}
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if (reg->fifos.header_only) {
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range->range_data_size = cpu_to_le32(registers_size);
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goto out;
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}
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/* Lock fence */
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iwl_write_prph_no_grab(fwrt->trans, RXF_SET_FENCE_MODE + offs, 0x1);
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/* Set fence pointer to the same place like WR pointer */
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iwl_write_prph_no_grab(fwrt->trans, RXF_LD_WR2FENCE + offs, 0x1);
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/* Set fence offset */
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iwl_write_prph_no_grab(fwrt->trans, RXF_LD_FENCE_OFFSET_ADDR + offs,
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0x0);
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/* Read FIFO */
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addr = RXF_FIFO_RD_FENCE_INC + offs;
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for (i = 0; i < rxf_data.size; i += sizeof(__le32))
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*val++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
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out:
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iwl_trans_release_nic_access(fwrt->trans, &flags);
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return sizeof(*range) + le32_to_cpu(range->range_data_size);
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}
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static void *iwl_dump_ini_mem_fill_header(struct iwl_fw_runtime *fwrt,
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static void *iwl_dump_ini_mem_fill_header(struct iwl_fw_runtime *fwrt,
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struct iwl_fw_ini_region_cfg *reg,
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struct iwl_fw_ini_region_cfg *reg,
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void *data)
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void *data)
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@ -1362,6 +1461,15 @@ static u32 iwl_dump_ini_txf_ranges(struct iwl_fw_runtime *fwrt,
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return num_of_fifos;
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return num_of_fifos;
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}
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}
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static u32 iwl_dump_ini_rxf_ranges(struct iwl_fw_runtime *fwrt,
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struct iwl_fw_ini_region_cfg *reg)
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{
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/* Each Rx fifo needs a different offset and therefore, it's
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* region can contain only one fifo, i.e. 1 memory range.
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*/
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return 1;
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}
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static u32 iwl_dump_ini_mem_get_size(struct iwl_fw_runtime *fwrt,
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static u32 iwl_dump_ini_mem_get_size(struct iwl_fw_runtime *fwrt,
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struct iwl_fw_ini_region_cfg *reg)
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struct iwl_fw_ini_region_cfg *reg)
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{
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{
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@ -1433,6 +1541,23 @@ static u32 iwl_dump_ini_txf_get_size(struct iwl_fw_runtime *fwrt,
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return size;
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return size;
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}
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}
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static u32 iwl_dump_ini_rxf_get_size(struct iwl_fw_runtime *fwrt,
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struct iwl_fw_ini_region_cfg *reg)
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{
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struct iwl_ini_rxf_data rx_data;
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u32 size = sizeof(struct iwl_fw_ini_fifo_error_dump) +
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sizeof(struct iwl_fw_ini_fifo_error_dump_range) +
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le32_to_cpu(reg->fifos.num_of_registers) * sizeof(__le32);
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if (reg->fifos.header_only)
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return size;
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iwl_ini_get_rxf_data(fwrt, reg, &rx_data);
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size += rx_data.size;
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return size;
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}
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/**
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/**
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* struct iwl_dump_ini_mem_ops - ini memory dump operations
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* struct iwl_dump_ini_mem_ops - ini memory dump operations
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* @get_num_of_ranges: returns the number of memory ranges in the region.
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* @get_num_of_ranges: returns the number of memory ranges in the region.
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@ -1539,7 +1664,7 @@ static int iwl_fw_ini_get_trigger_len(struct iwl_fw_runtime *fwrt,
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size += hdr_len + iwl_dump_ini_txf_get_size(fwrt, reg);
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size += hdr_len + iwl_dump_ini_txf_get_size(fwrt, reg);
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break;
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break;
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case IWL_FW_INI_REGION_RXF:
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case IWL_FW_INI_REGION_RXF:
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size += iwl_fw_rxf_len(fwrt, &fwrt->smem_cfg);
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size += hdr_len + iwl_dump_ini_rxf_get_size(fwrt, reg);
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break;
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break;
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case IWL_FW_INI_REGION_PAGING: {
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case IWL_FW_INI_REGION_PAGING: {
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size += hdr_len;
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size += hdr_len;
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@ -1644,7 +1769,11 @@ static void iwl_fw_ini_dump_trigger(struct iwl_fw_runtime *fwrt,
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break;
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break;
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}
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}
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case IWL_FW_INI_REGION_RXF:
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case IWL_FW_INI_REGION_RXF:
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iwl_fw_dump_rxf(fwrt, data);
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ops.get_num_of_ranges = iwl_dump_ini_rxf_ranges;
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ops.get_size = iwl_dump_ini_rxf_get_size;
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ops.fill_mem_hdr = iwl_dump_ini_fifo_fill_header;
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ops.fill_range = iwl_dump_ini_rxf_iter;
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iwl_dump_ini_mem(fwrt, type, data, reg, &ops);
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break;
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break;
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case IWL_FW_INI_REGION_CSR:
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case IWL_FW_INI_REGION_CSR:
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ops.get_num_of_ranges = iwl_dump_ini_mem_ranges;
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ops.get_num_of_ranges = iwl_dump_ini_mem_ranges;
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@ -308,6 +308,9 @@ struct iwl_fw_ini_error_dump {
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struct iwl_fw_ini_error_dump_range ranges[];
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struct iwl_fw_ini_error_dump_range ranges[];
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} __packed;
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} __packed;
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/* This bit is used to differentiate between lmac and umac rxf */
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#define IWL_RXF_UMAC_BIT BIT(31)
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/**
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/**
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* struct iwl_fw_ini_fifo_error_dump_range - ini fifo range dump
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* struct iwl_fw_ini_fifo_error_dump_range - ini fifo range dump
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* @fifo_num: the fifo num. In case of rxf and umac rxf, set BIT(31) to
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* @fifo_num: the fifo num. In case of rxf and umac rxf, set BIT(31) to
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