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Allwinner Core Additions for 3.19
This has mostly been about introducing A80 support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUa8NAAAoJEBx+YmzsjxAgNZ0P/22p1VKumZyoNRKF3vHn+iNV MBDa7UgVWXXQvBuysPs4n0MmG4sF/jKuD9IzVp6AI6U0M4HFqYwNJJl5ScT0+9ho jXgdZ/CfDGmbkQGHLYeDbj+ShuZFtpkcpf0373qh3EaJyoJaOTaYRlbkpVp/GSfb M97Q/cqYw+rOqs/YrSJOQgKAAePl6Avi6hOVJ/cRATBvsdm80fcQ0SbuhTVWlH9j 5UXtLMDDbsCHnXCV05OkzkgQyJhNIhWuK8rURMTFG1HY5kkMQKSg1V8HSdjMoQp4 dx+HP8J5j3deshCOcRGxO4aCo3CPp8GYR2c5jPXYCTTnjrhCOiHI25GAcmOhuXXI Tpixwo08pqTzTrevI8q6heAwBk2c3JA5INKswHOuRd988oD7vSfJpEYmyN+H6v1S wjzNDdsPecH+1hVZhp5iQ0NzDX7K/9N8gt24A/shin2cnCHgkVoU1/MFq/S3ZLQk qtibbcvdgBXAiX5BWlqPi2pWUdQ6LWXh3+UvLu6uEIvg5lrhoPsOilbuUbgQ7fdR B6OOwWur9MoV/Y/C8aquubU9Dwj8nrmYJ5lzNvkffD6zFAx7Pg803WewaNowAoGG e9MU6gAAn4/Km8Oig+dIkptnYHW+nPoodPNyoAMaJ9Ce+3YzpxclPVjEAzyzkZFh +1geJcIUj9hYSJeKT0gu =cJ5x -----END PGP SIGNATURE----- Merge tag 'sunxi-core-for-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc Pull "Allwinner Core Additions for 3.19" from Maxime Ripard: This has mostly been about introducing A80 support * tag 'sunxi-core-for-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: ARM: sunxi: make sun6i SMP ops static ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER and RESET_CONTROLLER for sun9i Documentation: sunxi: Add A80 datasheet link devicetree: bindings: Document supported Allwinner sunxi SoCs ARM: sunxi: Introduce Allwinner A80 support devicetree: bindings: Add vendor prefix for Merrii Technology Co., Ltd. ARM: sunxi: Add debug uart used by sun9i (Allwinner A80) Documentation: sunxi: Update Allwinner SoC documentation (A31/A31s/A23) Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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8d6d5e128f
@ -37,16 +37,26 @@ SunXi family
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http://dl.linux-sunxi.org/A20/A20%20User%20Manual%202013-03-22.pdf
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- Allwinner A23
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+ Not Supported
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+ Datasheet
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http://dl.linux-sunxi.org/A23/A23%20Datasheet%20V1.0%2020130830.pdf
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+ User Manual
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http://dl.linux-sunxi.org/A23/A23%20User%20Manual%20V1.0%2020130830.pdf
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* Quad ARM Cortex-A7 based SoCs
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- Allwinner A31 (sun6i)
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+ Datasheet
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http://dl.linux-sunxi.org/A31/A31%20Datasheet%20-%20v1.00%20(2012-12-24).pdf
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http://dl.linux-sunxi.org/A31/A3x_release_document/A31/IC/A31%20datasheet%20V1.3%2020131106.pdf
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+ User Manual
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http://dl.linux-sunxi.org/A31/A3x_release_document/A31/IC/A31%20user%20manual%20V1.1%2020130630.pdf
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- Allwinner A31s (sun6i)
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+ Not Supported
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+ Datasheet
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http://dl.linux-sunxi.org/A31/A3x_release_document/A31s/IC/A31s%20datasheet%20V1.3%2020131106.pdf
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+ User Manual
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http://dl.linux-sunxi.org/A31/A3x_release_document/A31s/IC/A31s%20User%20Manual%20%20V1.0%2020130322.pdf
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* Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs
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- Allwinner A80
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+ Not Supported
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+ Datasheet
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http://dl.linux-sunxi.org/A80/A80_Datasheet_Revision_1.0_0404.pdf
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12
Documentation/devicetree/bindings/arm/sunxi.txt
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12
Documentation/devicetree/bindings/arm/sunxi.txt
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@ -0,0 +1,12 @@
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Allwinner sunXi Platforms Device Tree Bindings
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Each device tree must specify which Allwinner SoC it uses,
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using one of the following compatible strings:
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allwinner,sun4i-a10
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allwinner,sun5i-a10s
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allwinner,sun5i-a13
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allwinner,sun6i-a31
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allwinner,sun7i-a20
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allwinner,sun8i-a23
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allwinner,sun9i-a80
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@ -90,6 +90,7 @@ lltc Linear Technology Corporation
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marvell Marvell Technology Group Ltd.
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maxim Maxim Integrated Products
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mediatek MediaTek Inc.
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merrii Merrii Technology Co., Ltd.
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micrel Micrel Inc.
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microchip Microchip Technology Inc.
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mitsubishi Mitsubishi Electric Corporation
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@ -750,6 +750,14 @@ choice
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Say Y here if you want kernel low-level debugging support
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on SOCFPGA based platforms.
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config DEBUG_SUN9I_UART0
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bool "Kernel low-level debugging messages via sun9i UART0"
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depends on MACH_SUN9I
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select DEBUG_UART_8250
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help
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Say Y here if you want kernel low-level debugging support
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on Allwinner A80 based platforms on the UART0.
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config DEBUG_SUNXI_UART0
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bool "Kernel low-level debugging messages via sunXi UART0"
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depends on ARCH_SUNXI
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@ -1142,6 +1150,7 @@ config DEBUG_UART_PHYS
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default 0x02530c00 if DEBUG_KEYSTONE_UART0
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default 0x02531000 if DEBUG_KEYSTONE_UART1
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default 0x03010fe0 if ARCH_RPC
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default 0x07000000 if DEBUG_SUN9I_UART0
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default 0x10009000 if DEBUG_REALVIEW_STD_PORT || \
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DEBUG_VEXPRESS_UART0_CA9
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default 0x1010c000 if DEBUG_REALVIEW_PB1176_PORT
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@ -1231,6 +1240,7 @@ config DEBUG_UART_VIRT
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default 0xf2100000 if DEBUG_PXA_UART1
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default 0xf4090000 if ARCH_LPC32XX
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default 0xf4200000 if ARCH_GEMINI
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default 0xf7000000 if DEBUG_SUN9I_UART0
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default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
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DEBUG_S3C2410_UART0)
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default 0xf7004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
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@ -42,4 +42,11 @@ config MACH_SUN8I
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select MFD_SUN6I_PRCM
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select RESET_CONTROLLER
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config MACH_SUN9I
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bool "Allwinner (sun9i) SoCs support"
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default ARCH_SUNXI
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select ARCH_HAS_RESET_CONTROLLER
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select ARM_GIC
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select RESET_CONTROLLER
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endif
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@ -116,7 +116,7 @@ static int sun6i_smp_boot_secondary(unsigned int cpu,
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return 0;
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}
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struct smp_operations sun6i_smp_ops __initdata = {
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static struct smp_operations sun6i_smp_ops __initdata = {
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.smp_prepare_cpus = sun6i_smp_prepare_cpus,
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.smp_boot_secondary = sun6i_smp_boot_secondary,
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};
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@ -63,3 +63,12 @@ static const char * const sun8i_board_dt_compat[] = {
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DT_MACHINE_START(SUN8I_DT, "Allwinner sun8i (A23) Family")
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.dt_compat = sun8i_board_dt_compat,
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MACHINE_END
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static const char * const sun9i_board_dt_compat[] = {
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"allwinner,sun9i-a80",
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NULL,
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};
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DT_MACHINE_START(SUN9I_DT, "Allwinner sun9i Family")
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.dt_compat = sun9i_board_dt_compat,
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MACHINE_END
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