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net: hns3: Prevent sending command during global or core reset
According to hardware's description, driver should not send command to IMP while hardware doing global or core reset. Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -206,7 +206,8 @@ int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num)
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spin_lock_bh(&hw->cmq.csq.lock);
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if (num > hclge_ring_space(&hw->cmq.csq)) {
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if (num > hclge_ring_space(&hw->cmq.csq) ||
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test_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state)) {
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spin_unlock_bh(&hw->cmq.csq.lock);
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return -EBUSY;
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}
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@ -346,6 +347,7 @@ int hclge_cmd_init(struct hclge_dev *hdev)
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spin_lock_init(&hdev->hw.cmq.crq.lock);
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hclge_cmd_init_regs(&hdev->hw);
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clear_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state);
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ret = hclge_cmd_query_firmware_version(&hdev->hw, &version);
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if (ret) {
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@ -2507,12 +2507,14 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval)
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/* check for vector0 reset event sources */
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if (BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B) & rst_src_reg) {
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set_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state);
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set_bit(HNAE3_GLOBAL_RESET, &hdev->reset_pending);
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*clearval = BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B);
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return HCLGE_VECTOR0_EVENT_RST;
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}
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if (BIT(HCLGE_VECTOR0_CORERESET_INT_B) & rst_src_reg) {
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set_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state);
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set_bit(HNAE3_CORE_RESET, &hdev->reset_pending);
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*clearval = BIT(HCLGE_VECTOR0_CORERESET_INT_B);
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return HCLGE_VECTOR0_EVENT_RST;
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@ -128,6 +128,7 @@ enum HCLGE_DEV_STATE {
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HCLGE_STATE_MBX_SERVICE_SCHED,
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HCLGE_STATE_MBX_HANDLING,
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HCLGE_STATE_STATISTICS_UPDATING,
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HCLGE_STATE_CMD_DISABLE,
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HCLGE_STATE_MAX
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};
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