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sb_edac: Fix erroneous bytes->gigabytes conversion
Signed-off-by: Jim Snow <jim.snow@intel.com> Signed-off-by: Lukasz Anaczkowski <lukasz.anaczkowski@intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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50043e257c
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8c00910029
@ -909,7 +909,7 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
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u32 reg;
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u64 limit, prv = 0;
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u64 tmp_mb;
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u32 mb, kb;
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u32 gb, mb;
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u32 rir_way;
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/*
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@ -919,15 +919,17 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
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pvt->tolm = pvt->info.get_tolm(pvt);
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tmp_mb = (1 + pvt->tolm) >> 20;
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mb = div_u64_rem(tmp_mb, 1000, &kb);
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edac_dbg(0, "TOLM: %u.%03u GB (0x%016Lx)\n", mb, kb, (u64)pvt->tolm);
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gb = div_u64_rem(tmp_mb, 1024, &mb);
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edac_dbg(0, "TOLM: %u.%03u GB (0x%016Lx)\n",
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gb, (mb*1000)/1024, (u64)pvt->tolm);
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/* Address range is already 45:25 */
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pvt->tohm = pvt->info.get_tohm(pvt);
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tmp_mb = (1 + pvt->tohm) >> 20;
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mb = div_u64_rem(tmp_mb, 1000, &kb);
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edac_dbg(0, "TOHM: %u.%03u GB (0x%016Lx)\n", mb, kb, (u64)pvt->tohm);
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gb = div_u64_rem(tmp_mb, 1024, &mb);
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edac_dbg(0, "TOHM: %u.%03u GB (0x%016Lx)\n",
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gb, (mb*1000)/1024, (u64)pvt->tohm);
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/*
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* Step 2) Get SAD range and SAD Interleave list
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@ -949,11 +951,11 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
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break;
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tmp_mb = (limit + 1) >> 20;
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mb = div_u64_rem(tmp_mb, 1000, &kb);
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gb = div_u64_rem(tmp_mb, 1024, &mb);
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edac_dbg(0, "SAD#%d %s up to %u.%03u GB (0x%016Lx) Interleave: %s reg=0x%08x\n",
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n_sads,
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get_dram_attr(reg),
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mb, kb,
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gb, (mb*1000)/1024,
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((u64)tmp_mb) << 20L,
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INTERLEAVE_MODE(reg) ? "8:6" : "[8:6]XOR[18:16]",
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reg);
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@ -984,9 +986,9 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
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break;
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tmp_mb = (limit + 1) >> 20;
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mb = div_u64_rem(tmp_mb, 1000, &kb);
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gb = div_u64_rem(tmp_mb, 1024, &mb);
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edac_dbg(0, "TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT: %d, %d, %d, %d, reg=0x%08x\n",
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n_tads, mb, kb,
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n_tads, gb, (mb*1000)/1024,
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((u64)tmp_mb) << 20L,
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(u32)TAD_SOCK(reg),
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(u32)TAD_CH(reg),
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@ -1009,10 +1011,10 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
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tad_ch_nilv_offset[j],
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®);
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tmp_mb = TAD_OFFSET(reg) >> 20;
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mb = div_u64_rem(tmp_mb, 1000, &kb);
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gb = div_u64_rem(tmp_mb, 1024, &mb);
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edac_dbg(0, "TAD CH#%d, offset #%d: %u.%03u GB (0x%016Lx), reg=0x%08x\n",
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i, j,
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mb, kb,
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gb, (mb*1000)/1024,
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((u64)tmp_mb) << 20L,
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reg);
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}
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@ -1034,10 +1036,10 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
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tmp_mb = pvt->info.rir_limit(reg) >> 20;
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rir_way = 1 << RIR_WAY(reg);
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mb = div_u64_rem(tmp_mb, 1000, &kb);
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gb = div_u64_rem(tmp_mb, 1024, &mb);
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edac_dbg(0, "CH#%d RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d, reg=0x%08x\n",
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i, j,
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mb, kb,
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gb, (mb*1000)/1024,
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((u64)tmp_mb) << 20L,
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rir_way,
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reg);
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@ -1048,10 +1050,10 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
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®);
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tmp_mb = RIR_OFFSET(reg) << 6;
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mb = div_u64_rem(tmp_mb, 1000, &kb);
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gb = div_u64_rem(tmp_mb, 1024, &mb);
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edac_dbg(0, "CH#%d RIR#%d INTL#%d, offset %u.%03u GB (0x%016Lx), tgt: %d, reg=0x%08x\n",
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i, j, k,
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mb, kb,
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gb, (mb*1000)/1024,
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((u64)tmp_mb) << 20L,
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(u32)RIR_RNK_TGT(reg),
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reg);
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@ -1089,7 +1091,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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u8 ch_way, sck_way, pkg, sad_ha = 0;
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u32 tad_offset;
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u32 rir_way;
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u32 mb, kb;
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u32 mb, gb;
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u64 ch_addr, offset, limit = 0, prv = 0;
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@ -1358,10 +1360,10 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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continue;
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limit = pvt->info.rir_limit(reg);
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mb = div_u64_rem(limit >> 20, 1000, &kb);
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gb = div_u64_rem(limit >> 20, 1024, &mb);
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edac_dbg(0, "RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d\n",
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n_rir,
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mb, kb,
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gb, (mb*1000)/1024,
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limit,
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1 << RIR_WAY(reg));
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if (ch_addr <= limit)
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