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drm/exynos/fimc: simplify irq masking function
The name fimc_handle_irq suggests it is irq handler, but the function is for irq mask configuration. The patch renames the function to fimc_mask_irq and removes unused arguments. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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@ -290,25 +290,18 @@ static void fimc_handle_jpeg(struct fimc_context *ctx, bool enable)
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fimc_write(cfg, EXYNOS_CIGCTRL);
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}
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static void fimc_handle_irq(struct fimc_context *ctx, bool enable,
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bool overflow, bool level)
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static void fimc_mask_irq(struct fimc_context *ctx, bool enable)
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{
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u32 cfg;
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DRM_DEBUG_KMS("enable[%d]overflow[%d]level[%d]\n",
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enable, overflow, level);
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DRM_DEBUG_KMS("enable[%d]\n", enable);
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cfg = fimc_read(EXYNOS_CIGCTRL);
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if (enable) {
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cfg &= ~(EXYNOS_CIGCTRL_IRQ_OVFEN | EXYNOS_CIGCTRL_IRQ_LEVEL);
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cfg |= EXYNOS_CIGCTRL_IRQ_ENABLE;
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if (overflow)
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cfg |= EXYNOS_CIGCTRL_IRQ_OVFEN;
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if (level)
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cfg |= EXYNOS_CIGCTRL_IRQ_LEVEL;
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cfg &= ~EXYNOS_CIGCTRL_IRQ_OVFEN;
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cfg |= EXYNOS_CIGCTRL_IRQ_ENABLE | EXYNOS_CIGCTRL_IRQ_LEVEL;
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} else
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cfg &= ~(EXYNOS_CIGCTRL_IRQ_OVFEN | EXYNOS_CIGCTRL_IRQ_ENABLE);
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cfg &= ~EXYNOS_CIGCTRL_IRQ_ENABLE;
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fimc_write(cfg, EXYNOS_CIGCTRL);
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}
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@ -1180,12 +1173,12 @@ static int fimc_dst_set_buf_seq(struct fimc_context *ctx, u32 buf_id,
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/* interrupt enable */
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if (buf_type == IPP_BUF_ENQUEUE &&
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fimc_dst_get_buf_seq(ctx) >= FIMC_BUF_START)
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fimc_handle_irq(ctx, true, false, true);
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fimc_mask_irq(ctx, true);
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/* interrupt disable */
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if (buf_type == IPP_BUF_DEQUEUE &&
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fimc_dst_get_buf_seq(ctx) <= FIMC_BUF_STOP)
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fimc_handle_irq(ctx, false, false, true);
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fimc_mask_irq(ctx, false);
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err_unlock:
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mutex_unlock(&ctx->lock);
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@ -1520,7 +1513,7 @@ static int fimc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
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property = &c_node->property;
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fimc_handle_irq(ctx, true, false, true);
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fimc_mask_irq(ctx, true);
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for_each_ipp_ops(i) {
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config = &property->config[i];
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@ -1639,7 +1632,7 @@ static void fimc_ippdrv_stop(struct device *dev, enum drm_exynos_ipp_cmd cmd)
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break;
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}
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fimc_handle_irq(ctx, false, false, true);
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fimc_mask_irq(ctx, false);
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/* reset sequence */
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fimc_write(0x0, EXYNOS_CIFCNTSEQ);
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