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esp_scsi: let DMA driver provide a config2 value

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On PCscsi, the FENAB configuration also enables 24-bit DMA
transfer lengths (and provides the chip id in TCHI after reset).
We want to be able to enable this parameter from the DMA driver.

Check if the caller of scsi_esp_register provided a value for esp->config2.
If this is the case, assume this is not an ESP100, skip the detection
phase and leave esp->config2 untouched.  It will be used in esp_reset_esp.

Reviewed-by: Hannes Reinecke <hare@suse.de>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
This commit is contained in:
Paolo Bonzini 2014-11-24 15:37:28 +01:00 committed by Christoph Hellwig
parent eeea2f9c2f
commit 8a9aeb45d0
1 changed files with 40 additions and 36 deletions
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76
drivers/scsi/esp_scsi.c
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@ -2219,46 +2219,50 @@ static void esp_get_revision(struct esp *esp)
u8 val; u8 val;
esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7)); esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY); if (esp->config2 == 0) {
esp_write8(esp->config2, ESP_CFG2); esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
val = esp_read8(ESP_CFG2);
val &= ~ESP_CONFIG2_MAGIC;
if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
/* If what we write to cfg2 does not come back, cfg2 is not
* implemented, therefore this must be a plain esp100.
*/
esp->rev = ESP100;
} else {
esp->config2 = 0;
esp_set_all_config3(esp, 5);
esp->prev_cfg3 = 5;
esp_write8(esp->config2, ESP_CFG2); esp_write8(esp->config2, ESP_CFG2);
esp_write8(0, ESP_CFG3);
val = esp_read8(ESP_CFG2);
val &= ~ESP_CONFIG2_MAGIC;
esp->config2 = 0;
if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
/*
* If what we write to cfg2 does not come back,
* cfg2 is not implemented.
* Therefore this must be a plain esp100.
*/
esp->rev = ESP100;
return;
}
}
esp_set_all_config3(esp, 5);
esp->prev_cfg3 = 5;
esp_write8(esp->config2, ESP_CFG2);
esp_write8(0, ESP_CFG3);
esp_write8(esp->prev_cfg3, ESP_CFG3);
val = esp_read8(ESP_CFG3);
if (val != 5) {
/* The cfg2 register is implemented, however
* cfg3 is not, must be esp100a.
*/
esp->rev = ESP100A;
} else {
esp_set_all_config3(esp, 0);
esp->prev_cfg3 = 0;
esp_write8(esp->prev_cfg3, ESP_CFG3); esp_write8(esp->prev_cfg3, ESP_CFG3);
val = esp_read8(ESP_CFG3); /* All of cfg{1,2,3} implemented, must be one of
if (val != 5) { * the fas variants, figure out which one.
/* The cfg2 register is implemented, however */
* cfg3 is not, must be esp100a. if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
*/ esp->rev = FAST;
esp->rev = ESP100A; esp->sync_defp = SYNC_DEFP_FAST;
} else { } else {
esp_set_all_config3(esp, 0); esp->rev = ESP236;
esp->prev_cfg3 = 0;
esp_write8(esp->prev_cfg3, ESP_CFG3);
/* All of cfg{1,2,3} implemented, must be one of
* the fas variants, figure out which one.
*/
if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
esp->rev = FAST;
esp->sync_defp = SYNC_DEFP_FAST;
} else {
esp->rev = ESP236;
}
esp->config2 = 0;
esp_write8(esp->config2, ESP_CFG2);
} }
} }
} }