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drm/i915: Add 'render basic' Haswell OA unit config

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Adds a static OA unit, MUX + B Counter configuration for basic render
metrics on Haswell. This is auto generated from an XML
description of metric sets, currently maintained in gputop, ref:

  https://github.com/rib/gputop
  > gputop-data/oa-*.xml
  > scripts/i915-perf-kernelgen.py

  $ make -C gputop-data -f Makefile.xml SYSFS=0 WHITELIST=RenderBasic

Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Sourab Gupta <sourab.gupta@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161107194957.3385-6-robert@sixbynine.org
This commit is contained in:
Robert Bragg 2016-11-07 19:49:51 +00:00 committed by Daniel Vetter
parent 10ff401df0
commit 8a3003dd93
4 changed files with 194 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/drm/i915/Makefile
View File

@ -118,7 +118,8 @@ i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
i915-y += i915_vgpu.o
# perf code
i915-y += i915_perf.o
i915-y += i915_perf.o \
i915_oa_hsw.o
ifeq ($(CONFIG_DRM_I915_GVT),y)
i915-y += intel_gvt.o

14
drivers/gpu/drm/i915/i915_drv.h
View File

@ -1797,6 +1797,11 @@ struct intel_wm_config {
bool sprites_scaled;
};
struct i915_oa_reg {
i915_reg_t addr;
u32 value;
};
struct i915_perf_stream;
struct i915_perf_stream_ops {
@ -2174,6 +2179,15 @@ struct drm_i915_private {
bool initialized;
struct mutex lock;
struct list_head streams;
struct {
u32 metrics_set;
const struct i915_oa_reg *mux_regs;
int mux_regs_len;
const struct i915_oa_reg *b_counter_regs;
int b_counter_regs_len;
} oa;
} perf;
/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */

144
drivers/gpu/drm/i915/i915_oa_hsw.c Normal file
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@ -0,0 +1,144 @@
/*
* Autogenerated file, DO NOT EDIT manually!
*
* Copyright (c) 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*/
#include "i915_drv.h"
#include "i915_oa_hsw.h"
enum metric_set_id {
METRIC_SET_ID_RENDER_BASIC = 1,
};
int i915_oa_n_builtin_metric_sets_hsw = 1;
static const struct i915_oa_reg b_counter_config_render_basic[] = {
{ _MMIO(0x2724), 0x00800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2714), 0x00800000 },
{ _MMIO(0x2710), 0x00000000 },
};
static const struct i915_oa_reg mux_config_render_basic[] = {
{ _MMIO(0x253a4), 0x01600000 },
{ _MMIO(0x25440), 0x00100000 },
{ _MMIO(0x25128), 0x00000000 },
{ _MMIO(0x2691c), 0x00000800 },
{ _MMIO(0x26aa0), 0x01500000 },
{ _MMIO(0x26b9c), 0x00006000 },
{ _MMIO(0x2791c), 0x00000800 },
{ _MMIO(0x27aa0), 0x01500000 },
{ _MMIO(0x27b9c), 0x00006000 },
{ _MMIO(0x2641c), 0x00000400 },
{ _MMIO(0x25380), 0x00000010 },
{ _MMIO(0x2538c), 0x00000000 },
{ _MMIO(0x25384), 0x0800aaaa },
{ _MMIO(0x25400), 0x00000004 },
{ _MMIO(0x2540c), 0x06029000 },
{ _MMIO(0x25410), 0x00000002 },
{ _MMIO(0x25404), 0x5c30ffff },
{ _MMIO(0x25100), 0x00000016 },
{ _MMIO(0x25110), 0x00000400 },
{ _MMIO(0x25104), 0x00000000 },
{ _MMIO(0x26804), 0x00001211 },
{ _MMIO(0x26884), 0x00000100 },
{ _MMIO(0x26900), 0x00000002 },
{ _MMIO(0x26908), 0x00700000 },
{ _MMIO(0x26904), 0x00000000 },
{ _MMIO(0x26984), 0x00001022 },
{ _MMIO(0x26a04), 0x00000011 },
{ _MMIO(0x26a80), 0x00000006 },
{ _MMIO(0x26a88), 0x00000c02 },
{ _MMIO(0x26a84), 0x00000000 },
{ _MMIO(0x26b04), 0x00001000 },
{ _MMIO(0x26b80), 0x00000002 },
{ _MMIO(0x26b8c), 0x00000007 },
{ _MMIO(0x26b84), 0x00000000 },
{ _MMIO(0x27804), 0x00004844 },
{ _MMIO(0x27884), 0x00000400 },
{ _MMIO(0x27900), 0x00000002 },
{ _MMIO(0x27908), 0x0e000000 },
{ _MMIO(0x27904), 0x00000000 },
{ _MMIO(0x27984), 0x00004088 },
{ _MMIO(0x27a04), 0x00000044 },
{ _MMIO(0x27a80), 0x00000006 },
{ _MMIO(0x27a88), 0x00018040 },
{ _MMIO(0x27a84), 0x00000000 },
{ _MMIO(0x27b04), 0x00004000 },
{ _MMIO(0x27b80), 0x00000002 },
{ _MMIO(0x27b8c), 0x000000e0 },
{ _MMIO(0x27b84), 0x00000000 },
{ _MMIO(0x26104), 0x00002222 },
{ _MMIO(0x26184), 0x0c006666 },
{ _MMIO(0x26284), 0x04000000 },
{ _MMIO(0x26304), 0x04000000 },
{ _MMIO(0x26400), 0x00000002 },
{ _MMIO(0x26410), 0x000000a0 },
{ _MMIO(0x26404), 0x00000000 },
{ _MMIO(0x25420), 0x04108020 },
{ _MMIO(0x25424), 0x1284a420 },
{ _MMIO(0x2541c), 0x00000000 },
{ _MMIO(0x25428), 0x00042049 },
};
static const struct i915_oa_reg *
get_render_basic_mux_config(struct drm_i915_private *dev_priv,
int *len)
{
*len = ARRAY_SIZE(mux_config_render_basic);
return mux_config_render_basic;
}
int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv)
{
dev_priv->perf.oa.mux_regs = NULL;
dev_priv->perf.oa.mux_regs_len = 0;
dev_priv->perf.oa.b_counter_regs = NULL;
dev_priv->perf.oa.b_counter_regs_len = 0;
switch (dev_priv->perf.oa.metrics_set) {
case METRIC_SET_ID_RENDER_BASIC:
dev_priv->perf.oa.mux_regs =
get_render_basic_mux_config(dev_priv,
&dev_priv->perf.oa.mux_regs_len);
if (!dev_priv->perf.oa.mux_regs) {
DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set");
/* EINVAL because *_register_sysfs already checked this
* and so it wouldn't have been advertised so userspace and
* so shouldn't have been requested
*/
return -EINVAL;
}
dev_priv->perf.oa.b_counter_regs =
b_counter_config_render_basic;
dev_priv->perf.oa.b_counter_regs_len =
ARRAY_SIZE(b_counter_config_render_basic);
return 0;
default:
return -ENODEV;
}
}

34
drivers/gpu/drm/i915/i915_oa_hsw.h Normal file
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@ -0,0 +1,34 @@
/*
* Autogenerated file, DO NOT EDIT manually!
*
* Copyright (c) 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*/
#ifndef __I915_OA_HSW_H__
#define __I915_OA_HSW_H__
extern int i915_oa_n_builtin_metric_sets_hsw;
extern int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv);
#endif