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https://github.com/edk2-porting/linux-next.git
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Merge branch 'topic/renesas' into for-linus
This commit is contained in:
commit
89b7e78fb2
@ -29,6 +29,7 @@ Required Properties:
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- "renesas,dmac-r8a77965" (R-Car M3-N)
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- "renesas,dmac-r8a77970" (R-Car V3M)
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- "renesas,dmac-r8a77980" (R-Car V3H)
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- "renesas,dmac-r8a77990" (R-Car E3)
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- "renesas,dmac-r8a77995" (R-Car D3)
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- reg: base address and length of the registers block for the DMAC
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@ -1,13 +1,10 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas R-Car Gen2 DMA Controller Driver
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*
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* Copyright (C) 2014 Renesas Electronics Inc.
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*
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* Author: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*/
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#include <linux/delay.h>
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@ -431,7 +428,8 @@ static void rcar_dmac_chan_start_xfer(struct rcar_dmac_chan *chan)
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chcr |= RCAR_DMACHCR_DPM_DISABLED | RCAR_DMACHCR_IE;
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}
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rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr | RCAR_DMACHCR_DE);
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rcar_dmac_chan_write(chan, RCAR_DMACHCR,
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chcr | RCAR_DMACHCR_DE | RCAR_DMACHCR_CAIE);
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}
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static int rcar_dmac_init(struct rcar_dmac *dmac)
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@ -761,21 +759,15 @@ static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan)
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dev_err(chan->chan.device->dev, "CHCR DE check error\n");
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}
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static void rcar_dmac_sync_tcr(struct rcar_dmac_chan *chan)
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static void rcar_dmac_clear_chcr_de(struct rcar_dmac_chan *chan)
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{
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u32 chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
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if (!(chcr & RCAR_DMACHCR_DE))
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return;
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/* set DE=0 and flush remaining data */
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rcar_dmac_chan_write(chan, RCAR_DMACHCR, (chcr & ~RCAR_DMACHCR_DE));
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/* make sure all remaining data was flushed */
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rcar_dmac_chcr_de_barrier(chan);
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/* back DE */
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rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
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}
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static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
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@ -783,7 +775,8 @@ static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
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u32 chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
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chcr &= ~(RCAR_DMACHCR_DSE | RCAR_DMACHCR_DSIE | RCAR_DMACHCR_IE |
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RCAR_DMACHCR_TE | RCAR_DMACHCR_DE);
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RCAR_DMACHCR_TE | RCAR_DMACHCR_DE |
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RCAR_DMACHCR_CAE | RCAR_DMACHCR_CAIE);
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rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
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rcar_dmac_chcr_de_barrier(chan);
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}
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@ -812,12 +805,7 @@ static void rcar_dmac_chan_reinit(struct rcar_dmac_chan *chan)
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}
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}
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static void rcar_dmac_stop(struct rcar_dmac *dmac)
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{
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rcar_dmac_write(dmac, RCAR_DMAOR, 0);
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}
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static void rcar_dmac_abort(struct rcar_dmac *dmac)
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static void rcar_dmac_stop_all_chan(struct rcar_dmac *dmac)
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{
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unsigned int i;
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@ -826,14 +814,24 @@ static void rcar_dmac_abort(struct rcar_dmac *dmac)
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struct rcar_dmac_chan *chan = &dmac->channels[i];
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/* Stop and reinitialize the channel. */
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spin_lock(&chan->lock);
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spin_lock_irq(&chan->lock);
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rcar_dmac_chan_halt(chan);
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spin_unlock(&chan->lock);
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rcar_dmac_chan_reinit(chan);
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spin_unlock_irq(&chan->lock);
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}
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}
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static int rcar_dmac_chan_pause(struct dma_chan *chan)
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{
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unsigned long flags;
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struct rcar_dmac_chan *rchan = to_rcar_dmac_chan(chan);
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spin_lock_irqsave(&rchan->lock, flags);
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rcar_dmac_clear_chcr_de(rchan);
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spin_unlock_irqrestore(&rchan->lock, flags);
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return 0;
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}
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/* -----------------------------------------------------------------------------
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* Descriptors preparation
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*/
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@ -1355,9 +1353,6 @@ static unsigned int rcar_dmac_chan_get_residue(struct rcar_dmac_chan *chan,
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residue += chunk->size;
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}
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if (desc->direction == DMA_DEV_TO_MEM)
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rcar_dmac_sync_tcr(chan);
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/* Add the residue for the current chunk. */
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residue += rcar_dmac_chan_read(chan, RCAR_DMATCRB) << desc->xfer_shift;
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@ -1522,11 +1517,26 @@ static irqreturn_t rcar_dmac_isr_channel(int irq, void *dev)
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u32 mask = RCAR_DMACHCR_DSE | RCAR_DMACHCR_TE;
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struct rcar_dmac_chan *chan = dev;
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irqreturn_t ret = IRQ_NONE;
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bool reinit = false;
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u32 chcr;
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spin_lock(&chan->lock);
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chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
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if (chcr & RCAR_DMACHCR_CAE) {
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struct rcar_dmac *dmac = to_rcar_dmac(chan->chan.device);
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/*
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* We don't need to call rcar_dmac_chan_halt()
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* because channel is already stopped in error case.
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* We need to clear register and check DE bit as recovery.
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*/
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rcar_dmac_write(dmac, RCAR_DMACHCLR, 1 << chan->index);
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rcar_dmac_chcr_de_barrier(chan);
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reinit = true;
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goto spin_lock_end;
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}
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if (chcr & RCAR_DMACHCR_TE)
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mask |= RCAR_DMACHCR_DE;
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rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr & ~mask);
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@ -1539,8 +1549,16 @@ static irqreturn_t rcar_dmac_isr_channel(int irq, void *dev)
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if (chcr & RCAR_DMACHCR_TE)
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ret |= rcar_dmac_isr_transfer_end(chan);
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spin_lock_end:
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spin_unlock(&chan->lock);
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if (reinit) {
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dev_err(chan->chan.device->dev, "Channel Address Error\n");
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rcar_dmac_chan_reinit(chan);
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ret = IRQ_HANDLED;
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}
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return ret;
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}
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@ -1597,24 +1615,6 @@ static irqreturn_t rcar_dmac_isr_channel_thread(int irq, void *dev)
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return IRQ_HANDLED;
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}
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static irqreturn_t rcar_dmac_isr_error(int irq, void *data)
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{
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struct rcar_dmac *dmac = data;
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if (!(rcar_dmac_read(dmac, RCAR_DMAOR) & RCAR_DMAOR_AE))
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return IRQ_NONE;
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/*
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* An unrecoverable error occurred on an unknown channel. Halt the DMAC,
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* abort transfers on all channels, and reinitialize the DMAC.
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*/
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rcar_dmac_stop(dmac);
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rcar_dmac_abort(dmac);
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rcar_dmac_init(dmac);
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return IRQ_HANDLED;
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}
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/* -----------------------------------------------------------------------------
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* OF xlate and channel filter
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*/
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@ -1784,8 +1784,6 @@ static int rcar_dmac_probe(struct platform_device *pdev)
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struct rcar_dmac *dmac;
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struct resource *mem;
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unsigned int i;
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char *irqname;
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int irq;
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int ret;
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dmac = devm_kzalloc(&pdev->dev, sizeof(*dmac), GFP_KERNEL);
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@ -1824,17 +1822,6 @@ static int rcar_dmac_probe(struct platform_device *pdev)
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if (IS_ERR(dmac->iomem))
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return PTR_ERR(dmac->iomem);
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irq = platform_get_irq_byname(pdev, "error");
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if (irq < 0) {
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dev_err(&pdev->dev, "no error IRQ specified\n");
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return -ENODEV;
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}
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irqname = devm_kasprintf(dmac->dev, GFP_KERNEL, "%s:error",
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dev_name(dmac->dev));
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if (!irqname)
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return -ENOMEM;
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/* Enable runtime PM and initialize the device. */
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pm_runtime_enable(&pdev->dev);
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ret = pm_runtime_get_sync(&pdev->dev);
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@ -1871,6 +1858,7 @@ static int rcar_dmac_probe(struct platform_device *pdev)
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engine->device_prep_slave_sg = rcar_dmac_prep_slave_sg;
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engine->device_prep_dma_cyclic = rcar_dmac_prep_dma_cyclic;
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engine->device_config = rcar_dmac_device_config;
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engine->device_pause = rcar_dmac_chan_pause;
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engine->device_terminate_all = rcar_dmac_chan_terminate_all;
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engine->device_tx_status = rcar_dmac_tx_status;
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engine->device_issue_pending = rcar_dmac_issue_pending;
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@ -1885,14 +1873,6 @@ static int rcar_dmac_probe(struct platform_device *pdev)
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goto error;
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}
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ret = devm_request_irq(&pdev->dev, irq, rcar_dmac_isr_error, 0,
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irqname, dmac);
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if (ret) {
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dev_err(&pdev->dev, "failed to request IRQ %u (%d)\n",
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irq, ret);
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return ret;
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}
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/* Register the DMAC as a DMA provider for DT. */
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ret = of_dma_controller_register(pdev->dev.of_node, rcar_dmac_of_xlate,
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NULL);
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@ -1932,7 +1912,7 @@ static void rcar_dmac_shutdown(struct platform_device *pdev)
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{
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struct rcar_dmac *dmac = platform_get_drvdata(pdev);
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rcar_dmac_stop(dmac);
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rcar_dmac_stop_all_chan(dmac);
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}
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static const struct of_device_id rcar_dmac_of_ids[] = {
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