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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-11-20 16:46:23 +08:00

Blackfin: increase default async timings for parallel flashes

The default async timings are a little too fast for the parallel flash
that is attached by default to the async banks.  So slow things down a bit
so accessing the hardware is stable.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Sonic Zhang 2009-09-07 03:20:48 +00:00 committed by Mike Frysinger
parent 4663f6ef25
commit 88c28b2df9
4 changed files with 7 additions and 7 deletions

View File

@ -358,9 +358,9 @@ CONFIG_C_AMBEN_ALL=y
# EBIU_AMBCTL Control
#
CONFIG_BANK_0=0x7BB0
CONFIG_BANK_1=0x5554
CONFIG_BANK_1=0x7BB0
CONFIG_BANK_2=0x7BB0
CONFIG_BANK_3=0xFFC0
CONFIG_BANK_3=0x99B2
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)

View File

@ -359,9 +359,9 @@ CONFIG_C_AMBEN_ALL=y
# EBIU_AMBCTL Control
#
CONFIG_BANK_0=0x7BB0
CONFIG_BANK_1=0x5554
CONFIG_BANK_1=0x7BB0
CONFIG_BANK_2=0x7BB0
CONFIG_BANK_3=0xFFC0
CONFIG_BANK_3=0x99B2
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)

View File

@ -363,9 +363,9 @@ CONFIG_C_AMBEN_ALL=y
# EBIU_AMBCTL Control
#
CONFIG_BANK_0=0x7BB0
CONFIG_BANK_1=0x5554
CONFIG_BANK_1=0x7BB0
CONFIG_BANK_2=0x7BB0
CONFIG_BANK_3=0xFFC0
CONFIG_BANK_3=0x99B2
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)

View File

@ -400,7 +400,7 @@ CONFIG_C_AMBEN_ALL=y
# EBIU_AMBCTL Control
#
CONFIG_BANK_0=0x7BB0
CONFIG_BANK_1=0x5554
CONFIG_BANK_1=0x7BB0
CONFIG_BANK_2=0x7BB0
CONFIG_BANK_3=0x99B2
CONFIG_EBIU_MBSCTLVAL=0x0