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Merge branch 'pm-fixes' into fixes
* pm-fixes: cpufreq: acpi-cpufreq: Don't set policy->related_cpus from .init() cpufreq: stats: do cpufreq_cpu_put() corresponding to cpufreq_cpu_get() intel-pstate: Use #defines instead of hard-coded values. cpufreq / intel_pstate: Fix calculation of current frequency cpufreq / intel_pstate: Add function to check that all MSRs are valid
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commit
887ede6661
@ -44,6 +44,7 @@
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#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
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#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
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#define MSR_PLATFORM_INFO 0x000000ce
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#define MSR_MTRRcap 0x000000fe
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#define MSR_IA32_BBL_CR_CTL 0x00000119
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#define MSR_IA32_BBL_CR_CTL3 0x0000011e
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@ -730,7 +730,6 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
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policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
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cpumask_copy(policy->cpus, perf->shared_cpu_map);
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}
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cpumask_copy(policy->related_cpus, perf->shared_cpu_map);
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#ifdef CONFIG_SMP
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dmi_check_system(sw_any_bug_dmi_table);
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@ -742,7 +741,6 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
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if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
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cpumask_clear(policy->cpus);
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cpumask_set_cpu(cpu, policy->cpus);
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cpumask_copy(policy->related_cpus, cpu_sibling_mask(cpu));
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policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
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pr_info_once(PFX "overriding BIOS provided _PSD data\n");
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}
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@ -180,15 +180,19 @@ static void cpufreq_stats_free_sysfs(unsigned int cpu)
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{
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struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
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if (!cpufreq_frequency_get_table(cpu))
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if (!policy)
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return;
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if (policy && !policy_is_shared(policy)) {
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if (!cpufreq_frequency_get_table(cpu))
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goto put_ref;
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if (!policy_is_shared(policy)) {
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pr_debug("%s: Free sysfs stat\n", __func__);
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sysfs_remove_group(&policy->kobj, &stats_attr_group);
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}
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if (policy)
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cpufreq_cpu_put(policy);
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put_ref:
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cpufreq_cpu_put(policy);
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}
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static int cpufreq_stats_create_table(struct cpufreq_policy *policy,
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@ -358,14 +358,14 @@ static void intel_pstate_sysfs_expose_params(void)
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static int intel_pstate_min_pstate(void)
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{
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u64 value;
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rdmsrl(0xCE, value);
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rdmsrl(MSR_PLATFORM_INFO, value);
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return (value >> 40) & 0xFF;
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}
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static int intel_pstate_max_pstate(void)
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{
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u64 value;
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rdmsrl(0xCE, value);
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rdmsrl(MSR_PLATFORM_INFO, value);
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return (value >> 8) & 0xFF;
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}
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@ -373,7 +373,7 @@ static int intel_pstate_turbo_pstate(void)
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{
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u64 value;
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int nont, ret;
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rdmsrl(0x1AD, value);
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rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
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nont = intel_pstate_max_pstate();
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ret = ((value) & 255);
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if (ret <= nont)
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@ -454,7 +454,7 @@ static inline void intel_pstate_calc_busy(struct cpudata *cpu,
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sample->idletime_us * 100,
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sample->duration_us);
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core_pct = div64_u64(sample->aperf * 100, sample->mperf);
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sample->freq = cpu->pstate.turbo_pstate * core_pct * 1000;
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sample->freq = cpu->pstate.max_pstate * core_pct * 1000;
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sample->core_pct_busy = div_s64((sample->pstate_pct_busy * core_pct),
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100);
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@ -752,6 +752,29 @@ static struct cpufreq_driver intel_pstate_driver = {
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static int __initdata no_load;
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static int intel_pstate_msrs_not_valid(void)
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{
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/* Check that all the msr's we are using are valid. */
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u64 aperf, mperf, tmp;
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rdmsrl(MSR_IA32_APERF, aperf);
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rdmsrl(MSR_IA32_MPERF, mperf);
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if (!intel_pstate_min_pstate() ||
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!intel_pstate_max_pstate() ||
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!intel_pstate_turbo_pstate())
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return -ENODEV;
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rdmsrl(MSR_IA32_APERF, tmp);
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if (!(tmp - aperf))
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return -ENODEV;
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rdmsrl(MSR_IA32_MPERF, tmp);
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if (!(tmp - mperf))
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return -ENODEV;
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return 0;
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}
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static int __init intel_pstate_init(void)
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{
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int cpu, rc = 0;
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@ -764,6 +787,9 @@ static int __init intel_pstate_init(void)
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if (!id)
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return -ENODEV;
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if (intel_pstate_msrs_not_valid())
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return -ENODEV;
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pr_info("Intel P-state driver initializing.\n");
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all_cpu_data = vmalloc(sizeof(void *) * num_possible_cpus());
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