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MIPS: improve checks for noncoherent DMA
Only one MIPS development board actually supports enabling/disabling DMA coherency at runtime, so it's not a good idea to push the overhead of checking that configuration setting onto every other supported target as well. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5912/
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@ -301,7 +301,7 @@ config MIPS_MALTA
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select CEVT_R4K
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select CSRC_R4K
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select CSRC_GIC
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select DMA_NONCOHERENT
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select DMA_MAYBE_COHERENT
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select GENERIC_ISA_DMA
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select HAVE_PCSPKR_PLATFORM
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select IRQ_CPU
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@ -893,6 +893,10 @@ config FW_CFE
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config ARCH_DMA_ADDR_T_64BIT
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def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
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config DMA_MAYBE_COHERENT
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select DMA_NONCOHERENT
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bool
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config DMA_COHERENT
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bool
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@ -9,7 +9,16 @@
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#ifndef __ASM_DMA_COHERENCE_H
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#define __ASM_DMA_COHERENCE_H
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#ifdef CONFIG_DMA_MAYBE_COHERENT
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extern int coherentio;
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extern int hw_coherentio;
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#else
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#ifdef CONFIG_DMA_COHERENT
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#define coherentio 1
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#else
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#define coherentio 0
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#endif
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#define hw_coherentio 0
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#endif /* CONFIG_DMA_MAYBE_COHERENT */
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#endif
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@ -49,11 +49,7 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
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static inline int plat_device_is_coherent(struct device *dev)
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{
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#ifdef CONFIG_DMA_COHERENT
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return 1;
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#else
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return coherentio;
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#endif
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}
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#ifdef CONFIG_SWIOTLB
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@ -23,6 +23,7 @@
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#include <dma-coherence.h>
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#ifdef CONFIG_DMA_MAYBE_COHERENT
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int coherentio = 0; /* User defined DMA coherency from command line. */
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EXPORT_SYMBOL_GPL(coherentio);
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int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
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@ -42,6 +43,7 @@ static int __init setnocoherentio(char *str)
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return 0;
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}
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early_param("nocoherentio", setnocoherentio);
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#endif
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static inline struct page *dma_addr_to_page(struct device *dev,
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dma_addr_t dma_addr)
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