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mfd: axp20x: Add support for AXP806 PMIC
The X-Powers AXP806 is a new PMIC that is paired with Allwinner's A80 SoC, along with a master AXP809 PMIC. This PMIC has a new register layout, and supports some functions not seen in other X-Powers PMICs, such as master-slave mode, or having multiple AXP806 PMICs on the same bus with address space extension, or supporting both I2C and RSB mode. I2C has not been tested. This patch adds support for the interrupts of the PMIC. A regulator sub-device is enabled, but actual regulator support will come in a later patch. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Chen-Yu Tsai
Lee Jones
parent
204ae2963e
commit
8824ee8573
@ -61,6 +61,7 @@ static int axp20x_rsb_remove(struct sunxi_rsb_device *rdev)
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static const struct of_device_id axp20x_rsb_of_match[] = {
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{ .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
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{ .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
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{ .compatible = "x-powers,axp809", .data = (void *)AXP809_ID },
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{ },
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};
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@ -38,6 +38,7 @@ static const char * const axp20x_model_names[] = {
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"AXP221",
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"AXP223",
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"AXP288",
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"AXP806",
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"AXP809",
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};
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@ -129,6 +130,27 @@ static const struct regmap_access_table axp288_volatile_table = {
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.n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
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};
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static const struct regmap_range axp806_writeable_ranges[] = {
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regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
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regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
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regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
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regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
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};
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static const struct regmap_range axp806_volatile_ranges[] = {
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regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
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};
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static const struct regmap_access_table axp806_writeable_table = {
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.yes_ranges = axp806_writeable_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
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};
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static const struct regmap_access_table axp806_volatile_table = {
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.yes_ranges = axp806_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
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};
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static struct resource axp152_pek_resources[] = {
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DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
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DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
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@ -278,6 +300,15 @@ static const struct regmap_config axp288_regmap_config = {
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.cache_type = REGCACHE_RBTREE,
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};
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static const struct regmap_config axp806_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.wr_table = &axp806_writeable_table,
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.volatile_table = &axp806_volatile_table,
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.max_register = AXP806_VREF_TEMP_WARN_L,
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.cache_type = REGCACHE_RBTREE,
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};
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#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
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[_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
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@ -409,6 +440,21 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
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INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
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};
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static const struct regmap_irq axp806_regmap_irqs[] = {
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INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
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INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
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INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
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INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
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INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
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INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
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INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
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INIT_REGMAP_IRQ(AXP806, PWROK_LONG, 1, 0),
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INIT_REGMAP_IRQ(AXP806, PWROK_SHORT, 1, 1),
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INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
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INIT_REGMAP_IRQ(AXP806, PWROK_FALL, 1, 5),
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INIT_REGMAP_IRQ(AXP806, PWROK_RISE, 1, 6),
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};
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static const struct regmap_irq axp809_regmap_irqs[] = {
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INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
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INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
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@ -494,6 +540,18 @@ static const struct regmap_irq_chip axp288_regmap_irq_chip = {
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};
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static const struct regmap_irq_chip axp806_regmap_irq_chip = {
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.name = "axp806",
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.status_base = AXP20X_IRQ1_STATE,
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.ack_base = AXP20X_IRQ1_STATE,
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.mask_base = AXP20X_IRQ1_EN,
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.mask_invert = true,
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.init_ack_masked = true,
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.irqs = axp806_regmap_irqs,
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.num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
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.num_regs = 2,
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};
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static const struct regmap_irq_chip axp809_regmap_irq_chip = {
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.name = "axp809",
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.status_base = AXP20X_IRQ1_STATE,
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@ -660,12 +718,20 @@ static struct mfd_cell axp288_cells[] = {
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},
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};
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static struct mfd_cell axp806_cells[] = {
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{
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.id = 2,
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.name = "axp20x-regulator",
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},
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};
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static struct mfd_cell axp809_cells[] = {
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{
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.name = "axp20x-pek",
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.num_resources = ARRAY_SIZE(axp809_pek_resources),
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.resources = axp809_pek_resources,
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}, {
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.id = 1,
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.name = "axp20x-regulator",
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},
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};
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@ -732,6 +798,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
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axp20x->regmap_cfg = &axp288_regmap_config;
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axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
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break;
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case AXP806_ID:
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axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
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axp20x->cells = axp806_cells;
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axp20x->regmap_cfg = &axp806_regmap_config;
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axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
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break;
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case AXP809_ID:
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axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
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axp20x->cells = axp809_cells;
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@ -20,6 +20,7 @@ enum {
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AXP221_ID,
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AXP223_ID,
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AXP288_ID,
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AXP806_ID,
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AXP809_ID,
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NR_AXP20X_VARIANTS,
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};
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@ -91,6 +92,30 @@ enum {
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#define AXP22X_ALDO3_V_OUT 0x2a
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#define AXP22X_CHRG_CTRL3 0x35
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#define AXP806_STARTUP_SRC 0x00
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#define AXP806_CHIP_ID 0x03
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#define AXP806_PWR_OUT_CTRL1 0x10
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#define AXP806_PWR_OUT_CTRL2 0x11
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#define AXP806_DCDCA_V_CTRL 0x12
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#define AXP806_DCDCB_V_CTRL 0x13
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#define AXP806_DCDCC_V_CTRL 0x14
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#define AXP806_DCDCD_V_CTRL 0x15
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#define AXP806_DCDCE_V_CTRL 0x16
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#define AXP806_ALDO1_V_CTRL 0x17
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#define AXP806_ALDO2_V_CTRL 0x18
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#define AXP806_ALDO3_V_CTRL 0x19
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#define AXP806_DCDC_MODE_CTRL1 0x1a
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#define AXP806_DCDC_MODE_CTRL2 0x1b
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#define AXP806_DCDC_FREQ_CTRL 0x1c
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#define AXP806_BLDO1_V_CTRL 0x20
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#define AXP806_BLDO2_V_CTRL 0x21
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#define AXP806_BLDO3_V_CTRL 0x22
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#define AXP806_BLDO4_V_CTRL 0x23
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#define AXP806_CLDO1_V_CTRL 0x24
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#define AXP806_CLDO2_V_CTRL 0x25
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#define AXP806_CLDO3_V_CTRL 0x26
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#define AXP806_VREF_TEMP_WARN_L 0xf3
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/* Interrupt */
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#define AXP152_IRQ1_EN 0x40
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#define AXP152_IRQ2_EN 0x41
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@ -265,6 +290,26 @@ enum {
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AXP22X_REG_ID_MAX,
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};
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enum {
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AXP806_DCDCA = 0,
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AXP806_DCDCB,
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AXP806_DCDCC,
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AXP806_DCDCD,
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AXP806_DCDCE,
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AXP806_ALDO1,
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AXP806_ALDO2,
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AXP806_ALDO3,
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AXP806_BLDO1,
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AXP806_BLDO2,
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AXP806_BLDO3,
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AXP806_BLDO4,
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AXP806_CLDO1,
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AXP806_CLDO2,
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AXP806_CLDO3,
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AXP806_SW,
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AXP806_REG_ID_MAX,
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};
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enum {
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AXP809_DCDC1 = 0,
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AXP809_DCDC2,
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@ -414,6 +459,21 @@ enum axp288_irqs {
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AXP288_IRQ_BC_USB_CHNG,
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};
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enum axp806_irqs {
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AXP806_IRQ_DIE_TEMP_HIGH_LV1,
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AXP806_IRQ_DIE_TEMP_HIGH_LV2,
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AXP806_IRQ_DCDCA_V_LOW,
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AXP806_IRQ_DCDCB_V_LOW,
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AXP806_IRQ_DCDCC_V_LOW,
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AXP806_IRQ_DCDCD_V_LOW,
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AXP806_IRQ_DCDCE_V_LOW,
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AXP806_IRQ_PWROK_LONG,
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AXP806_IRQ_PWROK_SHORT,
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AXP806_IRQ_WAKEUP,
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AXP806_IRQ_PWROK_FALL,
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AXP806_IRQ_PWROK_RISE,
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};
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enum axp809_irqs {
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AXP809_IRQ_ACIN_OVER_V = 1,
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AXP809_IRQ_ACIN_PLUGIN,
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