mirror of
https://github.com/edk2-porting/linux-next.git
synced 2025-01-01 10:13:58 +08:00
ARM: dts: rockchip: raise CPU trip point temperature for veyron to 100 degC
This value matches what is used by the downstream Chrome OS 3.14 kernel, the 'official' kernel for veyron devices. Keep the temperature for 'speedy' at 90°C, as in the downstream kernel. Increase the temperature for a hardware shutdown to 125°C, which matches the downstream configuration and gives the system a chance to shut down orderly at the criticial trip point. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
parent
1c04790234
commit
83be81e3b0
@ -64,6 +64,10 @@
|
||||
temperature = <70000>;
|
||||
};
|
||||
|
||||
&cpu_crit {
|
||||
temperature = <90000>;
|
||||
};
|
||||
|
||||
&edp {
|
||||
/delete-property/pinctrl-names;
|
||||
/delete-property/pinctrl-0;
|
||||
|
@ -123,6 +123,10 @@
|
||||
cpu0-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&cpu_crit {
|
||||
temperature = <100000>;
|
||||
};
|
||||
|
||||
/* rk3288-c used in Veyron Chrome-devices has slightly changed OPPs */
|
||||
&cpu_opp_table {
|
||||
/delete-node/ opp-312000000;
|
||||
@ -394,6 +398,7 @@
|
||||
|
||||
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
|
||||
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
|
||||
rockchip,hw-tshut-temp = <125000>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
|
Loading…
Reference in New Issue
Block a user