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ARM: at91/dt: sama5d4: add aes, sha and tdes nodes
Signed-off-by: Leilei Zhao <leilei.zhao@atmel.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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@ -1068,6 +1068,46 @@
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};
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};
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aes@fc044000 {
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compatible = "atmel,at91sam9g46-aes";
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reg = <0xfc044000 0x100>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
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dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
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AT91_XDMAC_DT_PERID(41)>,
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<&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
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AT91_XDMAC_DT_PERID(40)>;
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dma-names = "tx", "rx";
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clocks = <&aes_clk>;
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clock-names = "aes_clk";
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status = "disabled";
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};
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tdes@fc04c000 {
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compatible = "atmel,at91sam9g46-tdes";
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reg = <0xfc04c000 0x100>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
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dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
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AT91_XDMAC_DT_PERID(42)>,
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<&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
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AT91_XDMAC_DT_PERID(43)>;
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dma-names = "tx", "rx";
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clocks = <&tdes_clk>;
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clock-names = "tdes_clk";
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status = "disabled";
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};
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sha@fc050000 {
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compatible = "atmel,at91sam9g46-sha";
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reg = <0xfc050000 0x100>;
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interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
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dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
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AT91_XDMAC_DT_PERID(44)>;
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dma-names = "tx";
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clocks = <&sha_clk>;
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clock-names = "sha_clk";
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status = "disabled";
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};
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rstc@fc068600 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfc068600 0x10>;
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