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arm: dts: Add pinctrl/GPIO/EINT node for mt2701

Add pinctrl and GPIO node to mt2701.dtsi

Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Biao Huang 2016-01-27 09:24:43 +08:00 committed by Matthias Brugger
parent f55532a0c0
commit 8369337e55

View File

@ -15,6 +15,7 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton64.dtsi" #include "skeleton64.dtsi"
#include "mt2701-pinfunc.h"
/ { / {
compatible = "mediatek,mt2701"; compatible = "mediatek,mt2701";
@ -85,6 +86,24 @@
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
}; };
pio: pinctrl@10005000 {
compatible = "mediatek,mt2701-pinctrl";
reg = <0 0x1000b000 0 0x1000>;
mediatek,pctl-regmap = <&syscfg_pctl_a>;
pins-are-numbered;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
};
syscfg_pctl_a: syscfg@10005000 {
compatible = "mediatek,mt2701-pctl-a-syscfg", "syscon";
reg = <0 0x10005000 0 0x1000>;
};
watchdog: watchdog@10007000 { watchdog: watchdog@10007000 {
compatible = "mediatek,mt2701-wdt", compatible = "mediatek,mt2701-wdt",
"mediatek,mt6589-wdt"; "mediatek,mt6589-wdt";